Methods of fabricating MIM capacitors of semiconductor devices

Details Methods of fabricating MIM capacitors of semiconductor devices Methods of fabricating MIM capacitors of semiconductor devices

2006-07-04

2006-07-04

Tsai, H. Jey (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S396000

Reexamination Certificate

active

07071057

ABSTRACT:
Methods of fabricating a MIM capacitor and a dual damascene structure of a semiconductor device are disclosed. A disclosed method comprises forming a first conducting material as a lower interconnect on a semiconductor substrate; sequentially depositing second and third insulating layers over the first conducting layer; performing a first damascene process to form via holes and a trench within the second and the third insulating layers; filling the via holes and the trench to form a first contact plug connected to a lower interconnect and a second contact plug to contact the lower electrode of a MIM capacitor; forming the MIM capacitor over the second contact plug; sequentially depositing fourth and fifth insulating layers over the entire surface of the resulting structure; performing a second damascene process to form a via hole and a trench within the fourth and the fifth insulating layers; and filling the via hole and the trench to form a contact plug in contact with the upper electrode of the capacitor and another contact plug connected to the lower metal interconnect.

REFERENCES:
patent: 6271084 (2001-08-01), Tu et al.
patent: 6391713 (2002-05-01), Hsue et al.
patent: 6717193 (2004-04-01), Olewine et al.
patent: 6794262 (2004-09-01), Ning et al.
patent: 6958509 (2005-10-01), Korner et al.
patent: 2005/0082592 (2005-04-01), Chang et al.

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