Methods of fabricating integrated circuit bonding pads...

Details Methods of fabricating integrated circuit bonding pads... Methods of fabricating integrated circuit bonding pads...

2000-09-18

2002-10-15

Sherry, Michael (Department: 2829)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

Reexamination Certificate

active

06465337

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to integrated circuits and methods of forming the same, and more particularly to bonding pads for integrated circuits and methods of forming the same.
BACKGROUND OF THE INVENTION
Integrated circuits, also referred to as “chips”, are widely used in consumer and commercial electronic products. As is well known to those having skill in the art, an integrated circuit generally includes a substrate such as a semiconductor substrate and an array of bonding pads on the substrate. The bonding pads provide an electrical connection from outside the integrated circuit to microelectronic circuits in the integrated circuit.
FIG. 1
is a schematic view of an integrated circuit package including a plurality of bonding pads. As shown in
FIG. 1
, an integrated circuit
100
, for example, a memory integrated circuit that includes a memory cell array portion
110
and a peripheral circuit portion
115
, may include a plurality of bonding pads
200
. The bonding pads
200
can act as a gate for a circuit terminal of the integrated circuit
100
and may be internally connected to an input/output (IO) buffer circuit in the peripheral circuit portion
115
.
As shown in
FIG. 1
, the integrated circuit
100
is attached to a lead frame
300
. Wire bonding or other conventional techniques may be used to connect a respective wire
320
to a bonding pad
200
and to an inner lead tip
310
of the lead frame
300
.
FIG. 2
is an enlarged top view of a bonding pad
200
of FIG.
1
.
FIG. 3
is a perspective view of the bonding pad of FIG.
2
.
FIG. 4
is a sectional view of the bonding pad taken along line IV-IV′ of
FIG. 2
, and
FIG. 5
is a sectional view of the bonding pad taken along line V-V′ of FIG.
2
.
In a conventional bonding pad structure as shown in
FIGS. 2 through 5
, independent conductive plugs
245
, such as tungsten plugs fill a plurality of via holes
240
in an interconnection dielectric layer
250
. The conductive plugs
245
electrically connect a lower aluminum interconnection layer
230
with an upper aluminum interconnection layer
260
. Reference numerals
210
,
220
, and
270
denote an integrated circuit substrate, an interdielectric layer, and a wire bonding region, respectively.
Unfortunately, the pad structure shown in
FIGS. 2 through 5
may have problems. For example, as shown in
FIGS. 4 and 5
, during sorting for separating good integrated circuits
100
from a wafer, cracks
330
may occur in the interconnection dielectric layer
250
due to the force of a probe pin of a tester that is applied to the wire bonding region
270
. The cracks
330
also may occur in the interconnection dielectric layer
250
due to stress caused by mechanical impact and pressure applied during bonding of a wire
320
in the wire bonding region
270
.
Cracks may occur because the upper aluminum interconnection layer
260
and the lower aluminum interconnection layer
230
which are relatively soft, may change in shape due to the stress applied during the sorting or wire bonding. However, the interconnection dielectric layer
250
which is relatively hard, does not readily change in shape. Thus, a stress higher than a predetermined value can cause a slip of unstable tungsten plugs
245
or cracks in the interconnection dielectric layer
250
. The cracks
330
may extend to the inside of the insulating layer
250
surrounding the tungsten plugs
245
as shown in FIG.
5
.
The cracks occurring in the interconnection dielectric layer
250
may generate an interconnection layer-open problem in which the upper and the lower interconnection layers
260
and
230
slip. Alternatively, a pad-open problem may be created in which contact between the wire
320
and the upper aluminum interconnection layer
260
becomes bad such that the wire
320
slips from the upper aluminum interconnection layer
260
.
FIG. 6
is a top view of another conventional bonding pad structure in which tungsten plugs
245
are formed only in a peripheral region around the outside of the central wire bonding region, to reduce the interconnection dielectric layer cracking and to reduce interconnection layer or wire slipping.
FIG. 7
is a sectional view of the bonding pad structure taken along line VII-VII′ of FIG.
6
. This bonding pad structure is disclosed in U.S. Pat. No. 5,248,903 and U.S. Pat. No. 5,502,337.
A bonding pad structure according to
FIGS. 6 and 7
and the above two patents, may reduce the cracks of the interconnection dielectric layer
250
. However, the number of the tungsten plugs
245
also is reduced, which can result in a weaker attachment between the tungsten plug
245
and the upper aluminum interconnection layer
260
. As a result, the interconnection layer-open phenomenon, in which the upper aluminum interconnection layer
260
is broken, may more easily occur during wire bonding. Also, since the number of plugs is reduced, which may reduce the area for contacting the upper aluminum interconnection layer
260
, an increase in the resistance R
s
, and a reduction of current may result. Thus, sufficient current may not be supplied to a switching device in the integrated circuit, which may deteriorate the operation of the device.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide improved bonding pads for integrated circuits and methods of fabricating the same.
It is another object of the present invention to provide bonding pads and fabrication methods therefor that can reduce cracking in an insulating layer thereof.
These and other objects can be provided, according to the present invention, by bonding pads for integrated circuits that include first and second spaced apart conductive layers, a third continuous conductive layer between the first and second spaced apart conductive layers and an array of spaced apart insulating islands in the third continuous conductive layer that extend therethrough such that sidewalls of the insulating islands are surrounded by the third continuous conductive layer. A fourth continuous conductive layer also may be provided between the third continuous conductive layer and the second conductive layer and a second array of spaced apart insulating islands may be provided in the fourth continuous conductive layer, that extend therethrough, such that sidewalls of the insulating islands are surrounded by the fourth continuous conductive layer. A fifth continuous conductive layer also may be provided between the third and fourth continuous conductive layers and a third array of spaced apart insulating islands may be provided in the fifth continuous conductive layer, that extend therethrough, such that sidewalls of the third array of insulating islands are surrounded by the fifth continuous conductive layer.
The first and second arrays of spaced apart insulating islands preferably laterally overlap each other and may be congruent to each other. The third array of spaced apart insulating islands also may laterally overlap the first and second arrays. Preferably, the third array of spaced apart insulating islands are of the same shape as the first array, but of different sizes.
In other embodiments, the third continuous conductive layer includes a peripheral portion and a central portion. The array of spaced apart insulating islands in the third continuous conductive layer is located in the peripheral portion but not in the central portion. The sidewalls of the insulating islands may be cylindrical shaped, polygonal shaped or combinations thereof.
The present invention may be regarded as being opposite a conventional bonding pad in which spaced apart conductive plugs are provided in a dielectric layer between upper and lower pad layers. Rather, according to the present invention, spaced apart insulating islands are provided in a continuous conductive plug between the upper pad layer and the lower pad layer. By providing a continuous conductive plug with spaced apart insulating islands therein, cracking of the intermediate layer may be reduced. The resistance of the bonding p

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