Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-10-03
2006-10-03
Le, Dung (Department: 0438)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S258000, C438S259000, C438S508000, C438S508000, C257S315000, C257S316000, C257SE21420, C257SE21680
Reexamination Certificate
active
07115470
ABSTRACT:
There is provided a method of fabricating a split-gate flash memory cell using a spacer oxidation process. An oxidation barrier layer is formed on a floating gate layer, and an opening to expose a portion of the floating gate layer is formed in the oxidation barrier layer. Subsequently, a spacer is formed on a sidewall of the opening with a material layer having insulation property by oxidizing, and an inter-gate oxide layer pattern between a floating gate and a control gate is formed in the opening while the spacer is oxidized by performing an oxidation process.
REFERENCES:
patent: 6165845 (2000-12-01), Hsieh et al.
patent: 11-284084 (1999-10-01), None
Ahn Eung-yung
Jeon Sung-Yung
Kwon Chul-Soon
Lee Yong-Sun
Moon Jung-ho
Le Dung
Mills & Onello LLP
Samsung Electronics Ltd., Co.
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