Methods of fabricating electromechanical non-volatile memory...

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Physical deformation

Reexamination Certificate

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C257S619000, C257SE29309, C257SE21657, C438S053000

Reexamination Certificate

active

07911011

ABSTRACT:
Electromechanical non-volatile memory devices are provided including a semiconductor substrate having an upper surface including insulation characteristics. A first electrode pattern is provided on the semiconductor substrate. The first electrode pattern exposes portions of a surface of the semiconductor substrate therethrough. A conformal bit line is provided on the first electrode pattern and the exposed surface of semiconductor substrate. The bit line is spaced apart from a sidewall of the first electrode pattern and includes a conductive material having an elasticity generated by a voltage difference. An insulating layer pattern is provided on an upper surface of the bit line located on the semiconductor substrate. A second electrode pattern is spaced apart from the bit line and provided on the insulating layer pattern. The second electrode pattern faces the first electrode pattern. Related methods are also provided.

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patent: 2007/0015303 (2007-01-01), Bertin et al.
patent: 2008/0048246 (2008-02-01), Yun et al.
patent: 2008/0049491 (2008-02-01), Park
patent: 2008/0099860 (2008-05-01), Wuertz

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