Methods of etching platinum group metal film and forming...

Semiconductor device manufacturing: process – Making passive device – Stacked capacitor

Utility Patent

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Details

C438S706000, C438S717000, C438S722000, C438S725000

Utility Patent

active

06169009

ABSTRACT:

CROSS-REFERENCES TO RELATED APPLICATIONS
The present application claims priority under 35 U.S.C. §119 to Korean Patent Application No. 98-19477 filed on May 28, 1998, the entire contents of which are hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor memory device, and more particularly, to a method of etching a film formed of a metal belonging to a platinum (Pt) group, and a method of forming a lower electrode of a capacitor.
2. Description of the Related Art
In order to make a highly integrated dynamic random access memory (DRAM), methods of thinning the dielectric film of a capacitor, or using a three-dimensional structure for the lower electrode capacitor, have been suggested in order to increase capacitance within a limited cell area.
However, even though the above methods are adopted, it is difficult to obtain the capacitance required for operating a DRAM memory device of 1 Gigabit or more using a conventional dielectric material. Thus, to solve the above problems, much research has been conducted into replacing a dielectric film with a thin film having a high dielectric constant such as (Ba,Sr)TiO
3
(abbreviated BST), PbZrTiO
3
(abbreviated PZT), (Pb,La)(Zr,Ti)O
3
(abbreviated PLZT).
When using a high dielectric material such as BST in a DRAM, after forming a buried contact using a conductive plug formed of doped polysilicon, a lower electrode is formed thereon and then a dielectric material is deposited in order to form a capacitor.
In the case of the capacitor adopting the above high dielectric film, platinum (Pt) group metals or oxides thereof, e.g., platinum (Pt), iridium (Ir), iridium oxide (IrO
2
), ruthenium (Ru) or ruthenium oxide (RuO
2
), are used as an electrode material. In order to pattern a conductive film formed of such Pt group metals or oxides thereof, a sputtering method has been adopted. However, when etching the above conductive film by the sputtering method, polymer residue is produced, which causes slanted side walls of the electrodes. Thus, it is difficult to form a fine pattern.
Therefore, when etching the conductive film to form electrodes, the conductive film has been etched using a plasma containing plenty of oxygen, based on the fact that the material forming an etching mask is hardly etched by the plasma containing abundant oxygen.
However, when viewing the lower electrode, that is, the storage electrode, of the capacitor at the top, the width of a space between each node is different in the long- and short-axes. If the length of each node in the long-axis direction is very different from that in the short-axis direction, the etching rate becomes even higher in the long-axis direction than in the short-axis direction. In the memory device of 1 Gigabit or more, each node is very small, and the pitch of the nodes is also very tiny. Thus, a difference in etching rates as described above causes defects in the memory device above 1 Gigabit. In other words, when etching the conductive film, it is comparatively easy to separate each electrode pattern in the long-axis direction of the electrode while the electrode patterns are not completely separated in the short-axis direction.
Also, because the etching mask used for patterning the electrode is very thin in the memory device of 1 Gigabit, erosion of the etching mask occurs before the conductive film is completely etched. If etching is continued using the eroded etching mask, slant at the side walls of the obtained conductive pattern diverges from the allowable range, so it is difficult to separate the adjacent conductive film patterns.
SUMMARY OF THE INVENTION
The present invention is therefore directed to a method of etching a film and to a method of forming a lower electrode of a capacitor of a highly integrated memory which substantially overcomes one or more of the problems due to the limitations and disadvantages of the related art.
To solve the above problems, it is an objective of the present invention to provide a method of effectively etching an electrode film formed of a metal belonging to a platinum (Pt) group.
It is another objective of the present invention to provide a method of forming a lower electrode of a capacitor of a highly integrated semiconductor memory device, capable of completely separating each node even though the nodes have very fine pitch, by reducing a difference in etching rate caused by difference in width of space in the long- and short-axes of an electrode.
Accordingly, to achieve the above first objective, there is provided a method of etching a material film formed of a metal belonging to a platinum (Pt) group by a dry etching using a predetermined etching gas, wherein the etching gas is a gas mixture containing argon (Ar), oxygen (O
2
) and halogen.
Preferably, the material film is formed of one selected from the group consisting of metals belonging to the Pt group oxides of metals belonging to the Pt group, and mixtures thereof. For example, the material film is formed of platinum (Pt), iridium (Ir), iridium oxide (IrO
2
), ruthenium (Ru), ruthenium oxide (RuO
2
), or mixtures thereof.
Preferably, the material film is etched after a mask pattern containing titanium (Ti) is formed on the material film. Preferably, the mask pattern is formed of Ti or TiN.
Preferably, the etching gas is a gas mixture containing oxygen (O
2
), chloride (Cl
2
) and argon (Ar), or a gas mixture containing oxygen (O
2
), hydrogen bromide (HBr) and argon (Ar).
Preferably, the etching gas contains 70% or more O
2
based on the volume of the gas mixture.
Preferably, the etching gas contains 3~20% or more Cl
2
or HBr based on the volume of the gas mixture.
Preferably, the etching gas contains 3~20% or more Ar based on the volume of the gas mixture.
To achieve the second objective, there is provided a method of forming a lower electrode of a capacitor, including: forming a conductive film containing a metal belonging to a platinum (Pt) group on a semiconductor substrate; forming a hard mask on the conductive film, the hard mask partially exposing the conductive film; dry etching the exposed conductive film using the hard mask as an etching mask and a three-component gas mixture containing argon (Ar) and oxygen (O
2
) as an etching gas, to form a conductive film pattern beneath the hard mask; and removing the hard mask.
Preferably, the conductive film is formed of one selected from the group consisting of metals belonging to the Pt group, oxides of metals belonging to the Pt group, and mixtures thereof.
Preferably, forming the hard mask includes forming a single layer selected from one of Ti and TiN, or forming the hard mask includes forming two layers, including forming a first pattern from one of Ti and TiN and forming a second pattern from one of silicon oxide and photoresist.
Preferably, in the etching includes using one of a gas mixture containing oxygen (O
2
), chloride (Cl
2
) and argon (Ar) and a gas mixture containing oxygen (O
2
), hydrogen bromide (HBr) and argon (Ar).
Preferably, the etching gas contains 70% or more O
2
based on the volume of the gas mixture.
Preferably, the etching gas contains 3~20% or more Cl
2
or HBr based on the volume of the gas mixture.
Preferably, the etching gas contains 3~20% or more Ar based on the volume of the gas mixture.
Preferably, the etching includes using magnetically-enhanced reactive ion etching (MERIE). Here, a dual radio frequency (RF) power source may be used.
Preferably, in the removing of the hard mask includes using a dry etching method using a two-component gas mixture containing oxygen (O
2
) and fluoride (F
2
) as an etching gas.
Preferably, the etching gas is a gas mixture containing O
2
and carbon tetrafluoride (CF
4
), O
2
and sulfur hexafluoride (SF
6
), or O
2
and CHF
3
.
Preferably, the semiconductor substrate includes a conductive plug connected to an active region of the semiconductor substrate, and the method further includes forming a barrier film on the conductive plug before forming the conductive f

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