Methods for reducing electric fields during the fabrication of i

Details Methods for reducing electric fields during the fabrication of i Methods for reducing electric fields during the fabrication of i

1996-09-10

2000-02-22

Niebling, John F.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438585, 438652, H01L 2144

Patent

active

060280050

ABSTRACT:
A method for fabricating an integrated circuit device includes the steps of forming first and second conductive regions on a substrate. The second conductive region is divided into first and second subregions wherein the first subregion is adjacent the first conductive region. More particularly, the surface area of the first subregion is not more than ten times greater than the surface area of the first conductive region. The first and second subregions can then be electrically connected to complete the second conductive region. Related structures are also discussed.

REFERENCES:
patent: 4990980 (1991-02-01), Wada
patent: 5424857 (1995-06-01), Aoki et al.
patent: 5612546 (1997-03-01), Choi et al.
patent: 5717254 (1998-02-01), Hashimoto
patent: 5828101 (1998-10-01), Endo

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