Methods for preventing deleterious punch-through during local in

Details Methods for preventing deleterious punch-through during local in Methods for preventing deleterious punch-through during local in

1997-12-18

1999-04-20

Breneman, Bruce

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438675, 438586, H01L 2128, H01L 213205

Patent

active

058952691

ABSTRACT:
During damascene formation of local interconnects in a semiconductor wafer, a punch-through region can be formed into the substrate as a result of exposing the oxide spacers that are adjacent to a transistor gate to one or more etching plasmas that are used to etch one or more overlying dielectric layers. A punch-through region can damage the transistor circuit. In order to prevent punch-through, the oxide spacers are removed prior to forming an overlying dielectric layer.

REFERENCES:
patent: 5266156 (1993-11-01), Nasr
patent: 5602055 (1997-02-01), Nicholls et al.
patent: 5652182 (1997-07-01), Cleeves

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