Methods for minimizing mask undercuts and notches for plasma...

Details Methods for minimizing mask undercuts and notches for plasma... Methods for minimizing mask undercuts and notches for plasma...

2008-04-01

2008-04-01

Deo, Duy-Vu N. (Department: 1792)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S694000, C438S712000

Reexamination Certificate

active

11421000

ABSTRACT:
A method for etching silicon layer of a substrate, which is deposited on a bottom electrode in a plasma processing chamber. The method includes performing a main etch step until at least 70 percent of silicon layer is etched. The method further includes an overetch step, which includes a first, second, and third process steps. The first process step employs a first process recipe, the second process step employs a second process recipe, and the third process step employs a third process recipe. The second process recipe employs a second bottom bias voltage level applied to the bottom electrode which is higher than the first bottom bias voltage level employs in the first process recipe and the third bottom bias voltage level employs in the third process recipe. The first, second, and third process steps are alternated a plurality of times until silicon layer is etched through.

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