Methods for gap fill and planarization of intermetal dielectrics

Details Methods for gap fill and planarization of intermetal dielectrics Methods for gap fill and planarization of intermetal dielectrics

1996-12-16

1999-01-12

Bowers, Charles

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438622, 438624, 438626, 438633, 438692, 438697, 438699, 438762, 438780, 438788, 438789, H01L 21283

Patent

active

058588701

ABSTRACT:
An improved method of gap filling and planarization in the dielectric layer by combining an anti-reflective coating with a CMP etch stop is described. Semiconductor device structures are provided in and on a semiconductor substrate. A conducting layer is deposited overlying the surfaces of the semiconductor device structures. A hard mask is deposited overlying the conducting layer wherein the hard mask acts as an anti-reflective coating. The conducting layer and the hard mask are patterned to form conducting lines wherein a gap is formed between the conducting lines. A first dielectric layer is deposited over the surfaces of the conducting lines wherein the gap remains between the conducting lines. A second dielectric layer is deposited overlying the first dielectric layer wherein the gap is filled by the second dielectric layer. The first and second dielectric layers are planarized wherein the hard mask acts as an etch stop or a polish stop. A third dielectric layer is deposited over the planarized first and second dielectric layers completing the fabrication of the integrated circuit device.

REFERENCES:
patent: 5246884 (1993-09-01), Jaso et al.
patent: 5262346 (1993-11-01), Bindal et al.
patent: 5324690 (1994-06-01), Gelatos et al.
patent: 5362669 (1994-11-01), Boyd et al.
patent: 5385866 (1995-01-01), Bartush
patent: 5593919 (1997-01-01), Lee et al.
patent: 5654216 (1997-08-01), Adrian
patent: 5656543 (1997-08-01), Chung
patent: 5723380 (1998-03-01), Wang et al.
patent: 5763954 (1998-06-01), Hyakutake

Affiliated with

Also associated with

Rating

Methods for gap fill and planarization of intermetal dielectrics does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods for gap fill and planarization of intermetal dielectrics, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods for gap fill and planarization of intermetal dielectrics will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1515171