Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent
1997-03-17
1999-08-24
Whitehead, Jr., Carl
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
438637, 438638, 438639, H01L 2348
Patent
active
059428031
ABSTRACT:
A method for forming an opening in an integrated circuit device with an improved aspect ratio includes the following steps. An inter-insulating layer is formed on a surface of a substrate. A recess having a first width is then formed in the inter-insulating layer. Next, a hole having a second width is formed in the inter-insulating layer at a base of the recess, wherein the first width is greater than the second width. Thus, an opening is formed to have a cross-sectional shape of a step where its upper portion formed by the recess which is wider than its lower portion formed by the hole. Accordingly, open circuits caused by voids formed in the opening in subsequent metal deposition steps may be prevented.
REFERENCES:
patent: 5091768 (1992-02-01), Yamazaki
patent: 5463246 (1995-10-01), Matsunami
patent: 5519239 (1996-05-01), Chu
patent: 5605864 (1997-02-01), Prall
patent: 5684331 (1997-11-01), Jun
patent: 5847460 (1998-12-01), Liou et al.
Oh Kyung-seok
Shim Myoung-seob
Shin Hun-chul
Jr. Carl Whitehead
Samsung Electronics Co,. Ltd.
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