Methods for fabricating ferroelectric memory devices with...

Details Methods for fabricating ferroelectric memory devices with... Methods for fabricating ferroelectric memory devices with...

2006-03-20

2009-02-10

Luu, Chuong A. (Department: 2892)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

C438S003000, C438S240000, C438S239000, C438S253000

Reexamination Certificate

active

07488628

ABSTRACT:
Pursuant to embodiments of the present invention, ferroelectric memory devices are provided which comprise a transistor that is provided on an active region in a semiconductor substrate, and a capacitor that has a bottom electrode, a capacitor-ferroelectric layer and a top electrode. These devices may further include at least one planarizing layer that is adjacent to the side surfaces of the bottom electrode such that the top surface of the planarizing layer(s) and the top surface of the bottom electrode form a planar surface. The capacitor-ferroelectric may be formed on this planar surface. The device may also include a plug that electrically connects the bottom electrode to a source-drain region of the transistor. The ferroelectric memory devices according to embodiments of the present invention may reduce ferroelectric degradation of the capacitor.

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Notice to File Response, Korean Application No. 10-2003-0008202, mailed Dec. 17, 2004.

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