Methods for debugging a multiprocessor system

Details Methods for debugging a multiprocessor system Methods for debugging a multiprocessor system

1997-11-14

2000-08-08

An, Meng-Ai T.

Electrical computers and digital processing systems: processing

Processing control

Specialized instruction processing in support of testing,...

712227, 712231, 712210, 712212, G06F 0944

Patent

active

061015989

ABSTRACT:
A method of operating a multiple processor device. A first word of a sequence of words is received in a register. A target processor is determined from the first word and the target processor is interrupted. An input ready bit is set and first word from in the register is read with the target processor. A number of words in the sequence to follow the first word determined from the first word. A word counter is set and the input ready bit is cleared with the target processor. The target processor is returned to main code execution.

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patent: 5864689 (1999-01-01), Tran
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patent: 5919255 (1999-07-01), Seshan

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