Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-08-07
2007-08-07
Chung, Phung My (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S733000, C714S819000, C714S723000
Reexamination Certificate
active
11203236
ABSTRACT:
A method for semiconductor defect detection, applied to a wafer test in a semiconductor process. A defect test is implemented for generating redundant information. an abnormal test implemented for generating a first FBM. The redundant information is converted to a second FBM. The first and second FBMs are compared, thereby generating a third FBM according to comparison results.
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Chang Yen-Sheng
Liu Tong-Yu
Birch & Stewart Kolasch & Birch, LLP
Chung Phung My
Powerchip Semiconductor Corp.
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