Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-08-08
2006-08-08
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07089528
ABSTRACT:
Disclosed are methods and systems for estimating a reticle bias state for a process system, that include computing a difference between control data provided to the process system and error data based on a process system output(s), and estimating the reticle bias state based on weighted measures associated with the control data, the weighted measures being based on the number of data points included in the difference. The methods and systems include associating the reticle bias state estimate with a first quality factor, computing at least one weighted measure based on a number of data elements associated with the reticle, using the weighted measure(s) to provide a computed reticle bias state estimate and an associated computed quality factor, and, comparing the computed quality factor with the first quality factor to determine whether to update the reticle bias state estimate with the computed reticle bias state estimate.
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Crow David
Pellegrini Joseph
Capella Steven
Dinh Paul
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