Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-09-05
2010-02-09
Dang, Trung (Department: 2892)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S595000, C438S666000, C257SE21438, C257SE29278
Reexamination Certificate
active
07659171
ABSTRACT:
A method for forming a borderless contact for a semiconductor FET (Field Effect Transistor) device, the method comprising, forming a gate conductor stack on a substrate, forming spacers on the substrate, such that the spacers and the gate conductor stack partially define a volume above the gate conductor stack, wherein the spacers are sized to define the volume such that a stress liner layer deposited on the gate conductor stack substantially fills the volume, depositing a liner layer on the substrate, the spacers, and the gate conductor stack, depositing a dielectric layer on the liner layer, etching to form a contact hole in the dielectric layer, etching to form the contact hole in the liner layer, such that a portion of a source/drain diffusion area formed in the substrate is exposed and depositing contact metal in the contact hole.
REFERENCES:
patent: 7126198 (2006-10-01), Steiner et al.
patent: 2007/0010073 (2007-01-01), Chen et al.
patent: 2007/0090395 (2007-04-01), Sebe et al.
patent: 2007/0131972 (2007-06-01), Li
Furukawa Toshiharu
Holmes Steven J
Horak David V
Koburger, III Charles W.
Cai Yuanmin
Cantor & Colburn LLP
Dang Trung
International Business Machines - Corporation
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