Methods and circuits for single-memory cell multivalue data stor

Details Methods and circuits for single-memory cell multivalue data stor Methods and circuits for single-memory cell multivalue data stor

1997-12-05

1999-11-23

Dinh, Son T.

Static information storage and retrieval

Systems using particular element

Flip-flop

365226, G11C 1100

Patent

active

059911913

ABSTRACT:
Multivalued memory cell 300 includes a latch 300 having a latching node operating between a variable voltage rail and a fixed voltage rail. Circuitry 303 allows for latching of node to a voltage level of the variable voltage rail, the voltage level at the latched node representing a data value. Circuitry 303 provides for the outputing of the voltage level from the latched node.

REFERENCES:
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patent: 5353248 (1994-10-01), Gupta
patent: 5365475 (1994-11-01), Matsumura et al.
1997 IEEE Internatl Solid-State Circuits Conf. pp. 74 & 75 "TP4.6: A 4-Level Storage 4 Gb DRAM" by Murotani, Naritake, Matano, Ohtsuki, Kasai, Koga, Koyama, Nakajima, Yamaguchi, Watanabe & Okuda.

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