Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Physical stress responsive
Reexamination Certificate
2006-09-19
2006-09-19
Smith, Bradley K. (Department: 2891)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Physical stress responsive
C438S026000, C438S127000, C257S417000, C257S788000, C257S792000
Reexamination Certificate
active
07109055
ABSTRACT:
Methods are provided for manufacturing a sensor. The method comprises depositing a sacrificial material at a first predetermined thickness onto a wafer having at least one sense element mounted thereon, the sacrificial material deposited at least partially onto the at least one sense element, forming an encapsulating layer at a second predetermined thickness less than the first predetermined thickness over the wafer and around the deposited sacrificial material, and removing the sacrificial material. Apparatus for a sensor manufactured by the aforementioned method are also provided.
REFERENCES:
patent: 5605489 (1997-02-01), Gale et al.
patent: 6316840 (2001-11-01), Otani
patent: 6335224 (2002-01-01), Peterson et al.
patent: 6432737 (2002-08-01), Webster
patent: 6472243 (2002-10-01), Gogoi et al.
patent: 6635509 (2003-10-01), Ouellet
patent: 6939734 (2005-09-01), Franosch et al.
patent: 6951769 (2005-10-01), Malone
patent: 2004/0023470 (2004-02-01), Hsu et al.
patent: 2004/0118214 (2004-06-01), McDonald et al.
patent: 2005/0048688 (2005-03-01), Patel et al.
patent: 2005/0130337 (2005-06-01), Wu et al.
Hooper Stephen R.
McDonald William G.
Salian Arvind S.
Freescale Semiconductor Inc.
Fulk Steven J.
Ingrassia,Fisher&Lorenz
Smith Bradley K.
LandOfFree
Methods and apparatus having wafer level chip scale package... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods and apparatus having wafer level chip scale package..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and apparatus having wafer level chip scale package... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3599085