Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-08-21
2007-08-21
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C327S145000
Reexamination Certificate
active
10628074
ABSTRACT:
Methods and apparatus are described for providing test access by synchronous test equipment to an asynchronous circuit. Synchronous-to-asynchronous (S2A) conversion circuitry is operable to receive synchronous input data serially from the synchronous test equipment and convert the synchronous input data to asynchronous input data. Asynchronous logic is operable to transmit the asynchronous input data to a first test register in the asynchronous circuit, and to transmit asynchronous output data received from a second test register in the asynchronous circuit. The asynchronous output data results from application of the asynchronous input data to the asynchronous circuit. Operation of the asynchronous logic is synchronized at least in part with a clock signal associated with the synchronous test equipment. Asynchronous-to-synchronous (A2S) conversion circuitry is operable to receive the asynchronous output data from the asynchronous logic, convert the asynchronous output data to synchronous output data, and serially transmit the synchronous output data to the synchronous test equipment.
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Boulton Jeremy
Moacanin Michel A.
Novak Steven
Beyer & Weaver, LLP
Britt Cynthia
Fulcrum Microsystems Inc.
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