Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-08-07
2007-08-07
Chung, Phung My (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S733000, C714S732000, C714S030000
Reexamination Certificate
active
10959856
ABSTRACT:
In one embodiment, a method provides scan patterns to an electronic device having BIST hardware. The BIST hardware has production and diagnostic test modes, and the device outputs one or more response signatures in the production test mode and outputs raw response data in the diagnostic test mode. In production test mode, the method uses ATE to 1) provide a first series of scan test patterns to the BIST hardware, and 2) capture and compare response signatures to expected response signatures, to identify a number of failing scan test patterns. The method then uses the ATE to identify a number of unique labels associated with the failing patterns. In diagnostic test mode, the method uses the ATE to 1) provide a second series of scan test patterns to the BIST hardware, and 2) capture raw response data. The scan test patterns in the second series correspond to the identified labels.
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Chindamo Domenico
Salagianis Ariadne
Chung Phung My
Verigy (Singapore) PTE. Ltd.
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