Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1996-03-29
1998-07-21
Nuzzolillo, M.
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438723, 438734, 438738, 216 79, 216 72, 216 67, H01L 2100
Patent
active
057834962
ABSTRACT:
A method in a plasma processing chamber for fabricating a semiconductor device having a self-aligned contact. The method includes the step of providing a wafer having a substrate, a polysilicon layer disposed above the substrate, a nitride layer disposed above a polysilicon layer, and an oxide layer disposed above the nitride layer. The method further includes the step of etching in a first etching step partially through the oxide layer of the layer stack with a first chemistry and a first set of process parameters. In this first etching step, the first chemistry comprises essentially of CHF.sub.3 and C.sub.2 HF.sub.5. The method also includes the step of etching the oxide layer in a second etching step through to the substrate with a second chemistry comprising CHF.sub.3 and C.sub.2 HF.sub.5 and a second set of process parameters. The second set of process parameters is different from the first set of process parameters and represents a set of parameters for etching the oxide layer with a higher oxide-to-nitride selectivity than the oxide-to-nitride selectivity achieved in the first etching step.
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Cook Joel M.
Doe Adrian
Flanner Janet M.
Gadgil Prashant
Marquez Linda N.
Lam Research Corporation
Nuzzolillo M.
VerSteeg Steven H.
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