Method to slope conductor profile prior to dielectric deposition

Details Method to slope conductor profile prior to dielectric deposition Method to slope conductor profile prior to dielectric deposition

1993-04-16

1995-05-16

Nguyen, Nam

Fishing, trapping, and vermin destroying

20419232, 20419235, 437235, 437246, H01L 21465, C23C, C23C

Patent

active

054160480

ABSTRACT:
A process for semiconductor manufacture in which the top corners of conductive features are preferentially etched compared to the etch rate of the vertical and horizontal surfaces, thereby creating a sloped (prograde) profile, i.e., facets. The material removed through the sputter etch process is oxidized and redeposited along the sides of the feature and along the surface of the substrate, thereby improving step coverage when a subsequent dielectric layer is deposited thereon.

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Stanley Wolf and Richard N. Tauber, Silicon Processing For The VLSI ERA Vol. 1: Process Technology, 1986, pp. 366-367.
Peter Van Zant, Microchip Fabrication, 1990, pp. 344-351.

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