Method to protect internal components of semiconductor...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C118S719000, C257SE21092

Reexamination Certificate

active

07119032

ABSTRACT:
This invention relates to apparatus and a method to protect the internal components of semiconductor processing equipment such as a plasma reactor or a reactive species generator against physical and/or chemical damages during etching and/or cleaning processes. Layered superlattice materials having three or more metal elements such as strontium bismuth tantalate (SBT) are used to form a protective barrier on the surfaces of the internal components of a reaction chamber.

REFERENCES:
patent: 5201990 (1993-04-01), Chang et al.
patent: 5688565 (1997-11-01), McMillan et al.
patent: 5831277 (1998-11-01), Razeghi
patent: 5873977 (1999-02-01), Desu et al.
patent: 6056994 (2000-05-01), Paz de Araujo et al.
patent: 6095084 (2000-08-01), Shamouilian et al.
patent: 6307221 (2001-10-01), Danzilio
patent: 6533910 (2003-03-01), O'Donnell et al.
patent: 6537429 (2003-03-01), O'Donnell et al.
patent: 6613442 (2003-09-01), O'Donnell et al.
patent: 2001/0003271 (2001-06-01), Otsuki
patent: 2002/0036064 (2002-03-01), DeOmellas et al.
patent: 2002/0043215 (2002-04-01), Yoshioka et al.
patent: 2002/0195056 (2002-12-01), Sandhu et al.
patent: 2003/0159657 (2003-08-01), Kaushal et al.
patent: 2003/0162371 (2003-08-01), Udagawa et al.
patent: 2003/0185997 (2003-10-01), Hsieh
patent: 2003/0200929 (2003-10-01), Otsuki
patent: 2003/0219605 (2003-11-01), Molian et al.
patent: 2003/0226840 (2003-12-01), Dalton
patent: 2004/0168637 (2004-09-01), Gorokhovsky
patent: 2005/0100748 (2005-05-01), Cook et al.
patent: 1 026 281 (2000-08-01), None
patent: 1191582 (2002-03-01), None
patent: WO 99/20812 (1999-04-01), None
patent: WO 02/053794 (2002-07-01), None
patent: WO 02/053797 (2002-07-01), None
patent: WO 02/053799 (2002-07-01), None
patent: WO 02/054454 (2002-07-01), None
patent: WO 02/057506 (2002-07-01), None
patent: WO 02/079538 (2002-10-01), None
patent: WO 03/001559 (2003-01-01), None
patent: WO 03/080892 (2003-10-01), None
XP000768900; Deornellas S P, et al.; “Etching New IC Materials for Memory Devices”; Solid State Technology, Penwell Corp., Tulsa, OK; vol. 41, No. 8, Aug. 1998; pp. 53-44, 56, 58.
XP002382346 & RU 2100067 C1; Database WPI; Section Ch, Week 199835; Derwent Publications Ltd., London, GB; Class HO6, AN 1998-411884; As Sibe Catalysis Inst; Dec. 24, 1997.
Hovsepian P.E., et al; “Recent Progress in Large-Scale Production of Nanoscale Multilayer/Superlattice Hard Coatings”; Vacuum, Pergamon Press, GB; vol. 69, No. 1-3; Dec. 24, 2003, pp. 27-36.
XP002383823; Database Inspec (Online) The Institution of Electrical Engineers, Stevenage, GB; Mar. 30, 2000; Ledermann, N., et al.; “Sputtered Silicon Carbide Thin Films as Protective Coating for MEMS Applications”.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method to protect internal components of semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method to protect internal components of semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method to protect internal components of semiconductor... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3691242

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.