Method to minimize formation of recess at surface planarized...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S627000, C438S645000, C438S618000, C438S692000

Reexamination Certificate

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11237169

ABSTRACT:
When chemical mechanical planarization (CMP) is used to planarize a surface coexposing patterned features and dielectric fill, where patterned features and the fill are formed of materials having very different CMP removal rates or characteristics, the planarized surface may have excessively rough, dishing or recessing may take place, or one or more or the materials may be damaged. In structures in which planarity is important, these problems can be prevented by forming a capping layer on the patterned features, wherein the CMP removal rate of the material forming the capping layer is similar to the CMP removal rate of the dielectric fill.

REFERENCES:
patent: 5700737 (1997-12-01), Yu et al.
patent: 6611453 (2003-08-01), Ning

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