Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2009-10-16
2011-11-08
Blum, David S (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE21410, C257SE21419
Reexamination Certificate
active
08053315
ABSTRACT:
This invention discloses a method of manufacturing a trenched semiconductor power device with split gate filling a trench opened in a semiconductor substrate wherein the split gate is separated by an inter-poly insulation layer disposed between a top and a bottom gate segments. The method further includes a step of forming the inter-poly layer by applying a RTP process after a HDP oxide deposition process to bring an etch rate of the HDP oxide layer close to an etch rate of a thermal oxide.
REFERENCES:
patent: 6787409 (2004-09-01), Ji et al.
patent: 2005/0145934 (2005-07-01), Kocon et al.
patent: 2005/0167742 (2005-08-01), Challa et al.
patent: 2006/0246666 (2006-11-01), Han et al.
patent: 2010/0148300 (2010-06-01), Zhou
Chang Hong
Hébert François
Hu Yong-Zhong
Lou Yingying
Pan Mengyu
Alpha & Omega Semiconductor, LTD
Blum David S
Lin Bo-In
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