Method to improve the capacity of data retention and increase th

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438266, 438981, H01L 218247

Patent

active

060460865

ABSTRACT:
A method is provided for forming a split-gate flash memory cell having reduced size, increased capacitive coupling and improved data retention capability. A split-gate cell is also provided with appropriate gate oxide thicknesses between the substrate and the floating gate and between the floating gate and the control gate along with an extra thin nitride layer formed judiciously over the primary gate oxide layer in order to overcome the problems of low data retention capacity of the floating gate and the reduced capacitive coupling between the floating gate and the source of prior art.

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