Method to improve the breakdown voltage of P-channel devices

Details Method to improve the breakdown voltage of P-channel devices Method to improve the breakdown voltage of P-channel devices

1998-01-13

2000-03-07

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438297, 438298, H01L 21336

Patent

active

060339608

ABSTRACT:
A P-channel MOS device having an elevated breakdown voltage is created without increasing device size or requiring additional fabrication steps. During the P-field implant step, P type dopant is implanted into regions of the silicon expected to lie along the silicon-silicon dioxide interface after silicon dioxide growth. P type dopant implanted in this manner counteracts the effect of phosphorous accumulation at the silicon-silicon dioxide interface due to segregation of N type dopant during subsequent silicon dioxide growth steps

REFERENCES:
patent: 4011105 (1977-03-01), Paivinen et al.
patent: 4847213 (1989-07-01), Pfiester
patent: 5360749 (1994-11-01), Anjum et al.
patent: 5395773 (1995-03-01), Ravindhran et al.
patent: 5397727 (1995-03-01), Lee et al.
patent: 5486487 (1996-01-01), Ginami et al.

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