Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-04-22
1999-02-09
Booth, Richard A.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438305, 438592, H01L 21336
Patent
active
058693742
ABSTRACT:
A method for fabricating a MOS transistor with an inverse T-shaped air-gap gate structure on a semiconductor substrate is disclosed. The T-shaped air-gap gate structure reduces the parasitic resistance and capacitance; hence device structure operation speed can be improved. The method comprises the following steps: firstly, a gate hollow is defined in the pad oxide
itride layer. Next an ultra-thin nitrogen rich dielectric as a gate oxide is formed. After that, a thin .alpha.-Si is deposited, then an ion implantation is done to form a punchthrough stopping region. After forming a CVD oxide film, an anisotropic etching is followed to form oxide spacers. An undoped silicon layer then followed to refill the gate hollow region. A CMP processes or a dry etching is done to remove silicon layer until the nitride layer is exposed. Subsequently, the oxide spacers is removed to expose a dual hollow. A LDD implantation is then implanted into the substrate. Next a pad nitride/oxide layer is successive removed to expose the substrate by a dry etching method. Subsequently, a source/drain/gate implantation and a hight temperature oxidation are carried out to grow an oxide layer and seal the dual hollow so as to form a dual air gap. At the same time the extended S/D junction are formed.
REFERENCES:
patent: 4963504 (1990-10-01), Huang
patent: 5583067 (1996-12-01), Sanchez
patent: 5585295 (1996-12-01), Wu
patent: 5595919 (1997-01-01), Pan
patent: 5599725 (1997-02-01), Dorleans et al.
patent: 5736446 (1998-04-01), Wu
M. Togo et al., A Gate-Side Air-Gap Structure (GAS) to Reduce the Parasitic Capacitance in MOSFETs, 1996 Symposium on VLSI Technology Digest of Technical Papers, pp. 38-39.
Tiao-Yuan Huang et al., A New LDD Transistor with Inverse-T Gate Structure, IEEE Electron Device Letters, vol. EDL-8, No. 4, Apr. 1987, pp. 151-153.
D. Hagmann et al., A Method to Impede the Formation of Crystal Defects after High Dose Arsenic Implants, J. Electrochem. Soc.: Solid-State Science and Technology, Dec. 1986, pp. 2597-2600.
Booth Richard A.
Texas Instruments--Acer Incorporated
LandOfFree
Method to form mosfet with an inverse T-shaped air-gap gate stru does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method to form mosfet with an inverse T-shaped air-gap gate stru, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method to form mosfet with an inverse T-shaped air-gap gate stru will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1948135