Method to fabricate surface p-channel CMOS

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S199000, C438S219000, C438S514000

Reexamination Certificate

active

07005342

ABSTRACT:
An improved method of making CMOS surface channel transistors using fewer masking steps. In-situ doped poly silicon deposition can be used to reduce problems with poly depletion effects in transistor gates. In addition, using this method, the number of layers in each gate dielectric, the dielectric type, and dielectric thickness between n-channel and p-channel devices can be separately controlled. This method also allows the use of a lithography mask normally used to fabricate buried channel devices for use in fabricating surface channel devices, thus saving the manufacture of an additional mask.

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patent: 6110788 (2000-08-01), Violette et al.
patent: 6323103 (2001-11-01), Rengarajan et al.
patent: 6809014 (2004-10-01), Mathew et al.

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