Method to fabricate aligned dual damascene openings

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S637000, C438S737000

Reexamination Certificate

active

06967156

ABSTRACT:
A method of forming an aligned dual damascene opening, comprising including the following sequential steps. A layer stack is formed over the metal structure. The layer stack comprises, in ascending order: a bottom etch stop layer; a lower dielectric material layer; a middle etch stop layer; a middle dielectric material layer; and an upper dielectric layer. A patterned mask layer is formed over the patterned upper dielectric layer leaving exposed opposing portions of the patterned upper dielectric layer. The middle dielectric material layer is patterned to form an opening therein using the patterned mask layer and the exposed portions of the upper dielectric layer as masks. Simultaneously patterning the patterned middle dielectric material layer using the patterned upper dielectric layer as a mask to form an inchoate upper trench opening; and the lower dielectric material layer using the patterned mask layer and the patterned middle etch stop layer as masks to form an inchoate lower via opening aligned with the inchoate upper trench opening.

REFERENCES:
patent: 6087252 (2000-07-01), Lu
patent: 6133144 (2000-10-01), Tsai et al.
patent: 6350675 (2002-02-01), Chooi et al.
patent: 6380096 (2002-04-01), Hung et al.
patent: 2004/0121585 (2004-06-01), Liu et al.

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