Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-05-11
2009-11-03
Picardat, Kevin M (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S212000, C438S299000, C257SE21190
Reexamination Certificate
active
07611936
ABSTRACT:
A method for depositing metals on surfaces is provided which comprises (a) providing a substrate (103) having a horizontal surface (107) and a vertical surface (105); (b) depositing a first metal layer (109) over the horizontal and vertical surfaces; (c) depositing a layer of polysilicon (111) over the horizontal and vertical surfaces; (d) treating the layer of polysilicon with a plasma such that a residue (113) remaining from the treatment is preferentially formed over the horizontal surfaces rather than the vertical surfaces, and wherein the residue is resistant to a first metal etch; and (e) exposing the substrate to the first metal etch.
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Mathew, L. et al.; Double gate CMOS technology with sub-lithographic (<20nm), 100nm tall, Undoped channel, TiN+ HfxZr1-xO2 gate, Multiple Silicided Source/Drain with Record PMOS Ion/Ioff; University of Florida; Jan. 11, 2007; 2 pages.
Mathew Leo
Noble Ross E.
Rai Raghaw S.
Fortkort John A.
Fortkort & Houston P.C.
Freescale Semiconductor Inc.
Picardat Kevin M
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