Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-07-03
2007-07-03
Garbowski, Leigh M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C703S013000
Reexamination Certificate
active
10904950
ABSTRACT:
An improved solution for designing and/or evaluating a circuit is provided. A rule violation can be detected in design data for the circuit and a prediction can be generated based on an adjustment to the design data. For example, multiple predictions can be generated based on an adjustment window for an adjustable parameter in the design data. The predictions can be displayed to a user, who can determine a desired modification to the design data. The modification can be implemented by the user and/or automatically implemented by a circuit design tool.
REFERENCES:
patent: 4488354 (1984-12-01), Chan et al.
patent: 4791586 (1988-12-01), Maeda et al.
patent: 5051938 (1991-09-01), Hyduke
patent: 5062054 (1991-10-01), Kawakami et al.
patent: 5625578 (1997-04-01), Du Cloux et al.
patent: 5774367 (1998-06-01), Reyes et al.
patent: 5883808 (1999-03-01), Kawarabayashi
patent: 6212490 (2001-04-01), Li et al.
patent: 6230115 (2001-05-01), Ohsaki et al.
patent: 6321186 (2001-11-01), Yuan et al.
patent: 6405349 (2002-06-01), Gehman et al.
patent: 6564355 (2003-05-01), Smith et al.
patent: 6629305 (2003-09-01), Ito et al.
patent: 6687893 (2004-02-01), Teig et al.
patent: 6834380 (2004-12-01), Khazei
patent: 6938231 (2005-08-01), Yoshida et al.
patent: 2001/0052107 (2001-12-01), Anderson et al.
patent: 2002/0046391 (2002-04-01), Ito et al.
patent: 2002/0156607 (2002-10-01), Tosaka et al.
patent: 2004/0117746 (2004-06-01), Narain et al.
Duncan, S. A. et al., “Automated Physical Design Utility for Reworking Circuit Panels,” IBM Technical Disclosure Bulletin, vol. 36, No. 05, May 1993, pp. 257.
Archambeault Bruce R.
Cook Michelle K.
Gates Charles R.
Scott Derrick D.
Garbowski Leigh M.
Hoffman Warnick & D'Alessandro LLC
International Business Machines - Corporation
Petrokaitis Joseph
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