Method, system, and circuit for performing a memory related...

Details Method, system, and circuit for performing a memory related... Method, system, and circuit for performing a memory related...

2007-09-18

2007-09-18

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S189090, C365S204000, C365S220000

Reexamination Certificate

active

11001940

ABSTRACT:
A method, system, and circuit for performing a memory related operation are disclosed. An operating voltage is applied to a bitline and a neighboring bitline is precharged. The precharge voltage has a magnitude less than the operating voltage. Both voltages ramp up at like or different rates. The precharge voltage can reach its effective magnitude prior to or with the operating voltage reaching its effective value.

REFERENCES:
patent: 5524094 (1996-06-01), Nobukata et al.
patent: 6337807 (2002-01-01), Futatsuyama et al.
patent: 6396764 (2002-05-01), Holland
patent: 6490212 (2002-12-01), Nguyen et al.
patent: 6525969 (2003-02-01), Kurihara et al.
patent: 6639842 (2003-10-01), Hoang et al.
patent: 2002/0064075 (2002-05-01), Morishima
patent: 2003/0026145 (2003-02-01), Lee
patent: 2003/0151966 (2003-08-01), Demone
patent: 2004/0008561 (2004-01-01), Lee et al.
patent: 2004/0059840 (2004-03-01), Perego et al.
patent: 2005/0078525 (2005-04-01), Guo et al.

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