Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-04-07
2000-02-08
Monin, Jr., Donald L.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438381, 438393, 438396, 438257, 257296, 257300, 257306, 257379, H01L 218242
Patent
active
060227761
ABSTRACT:
A method for forming a DRAM cell of a DRAM circuit is disclosed. The DRAM circuit includes a periphery region and a cell region. The DRAM cell is in the cell region and comprises an access transistor and a capacitor. The access transistor has a gate, a source, and a drain. The periphery region includes a plurality of gates. The method comprises the deposition of a silicon oxynitride layer over the gates, the silicon oxynitride layer acting as a bottom anti-reflection coating. That portion of the silicon oxynitride layer that lies over the DRAM cell is removed. A landing pad is formed over the source of the access transistor and a bitline pad is formed over the drain of the transistor. Next, a first oxide layer is formed over the landing pad and the bitline pad. A capacitor is formed over the landing pad and a second oxide layer is formed over the capacitor. Finally, metal contacts are formed to at least one of the gates in the periphery region using the silicon oxynitride layer as a buffer layer to prevent substrate loss or overetching.
REFERENCES:
patent: 5716881 (1998-02-01), Liang et al.
patent: 5792687 (1998-08-01), Jeng et al.
patent: 5895239 (1999-04-01), Jeng et al.
patent: 5930627 (1999-07-01), Zhou et al.
Cherng Meng-Jaw
Lien Wan Yih
Linliu Kung
Monin, Jr. Donald L.
Pham Hoai
Worldwide Semiconductor Manufacturing Corporation
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