Method of testing logic devices

Details Method of testing logic devices Method of testing logic devices

1998-02-12

2000-10-17

De Cady, Albert

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

G01R 3128, G06F 1100

Patent

active

061346896

ABSTRACT:
A method of testing a logic device that includes the steps of identifying a first test vector corresponding to a test failure resulting from testing of the logic device (10), converting the first test vector from an input pin format into state data associated with the logic device, and searching the internal state data to identify a set of last shift transitions. A method of making a logic device having a specification frequency, the method including the steps of providing an integrated circuit, testing the integrated circuit using a scan test pattern at a frequency at least as great as the specification frequency, performing a diagnosis procedure to produce a diagnosis result, and producing the integrated circuit in a final form after the diagnosis result indicates a non-functional problem. The diagnosis result indicates at least one of a non-functional problem and a speed problem.

REFERENCES:
patent: 4853928 (1989-08-01), Williams
patent: 5574853 (1996-11-01), Barch et al.
patent: 5592493 (1997-01-01), Crouch et al.
patent: 5633606 (1997-05-01), Gaudet et al.
patent: 5684808 (1997-11-01), Valind

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