Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2008-09-30
2008-09-30
Louis-Jacques, Jacques (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C702S119000, C716S030000, C714S727000, C714S725000, C714S726000, C326S038000, C326S039000, C326S041000, C326S040000
Reexamination Certificate
active
11186373
ABSTRACT:
A method of testing circuits in a programmable logic device is described. According to one embodiment of the invention, a method comprises steps of configuring a configurable logic block of the programmable logic device with a test signal source and a logic circuit; routing the test signal source to the logic circuit; and determining if the logic circuit is defective. According to an alternate embodiment, a method enables re-routing a path from a shift register to a lookup table to determine whether a lookup table is defective. According to a further alternate embodiment, a method enables localized routing to reduce the probability that a defect is a result of a routing defect.
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King John J.
Louis-Jacques Jacques
Merant Guerrier
XILINX Inc.
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