Method of testing and diagnosing field programmable gate arrays

Details Method of testing and diagnosing field programmable gate arrays Method of testing and diagnosing field programmable gate arrays

1998-04-13

2000-08-22

Moise, Emmanuel L.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

39550017, G01R 3128

Patent

active

061088064

ABSTRACT:
A method of testing field programmable gate arrays (FPGAs) includes establishing a first group of programmable logic blocks as test pattern generators or output response analyzers and a second group of programmable logic blocks as blocks under test. This is followed by generating test patterns and comparing outputs of two blocks under test with one output response analyzer. Next is the combining of results of a plurality of output response analyzers utilizing an iterative comparator in order to produce a pass/fail indication. The method also includes the step of reconfiguring each block under test so that each block under test is tested in all possible modes of operation. Further, there follows the step of reversing programming of the groups of programmable logic blocks so that each programmable logic block is configured at least once as a block under test.

REFERENCES:
patent: Re34445 (1993-11-01), Hayes et al.
patent: 4414669 (1983-11-01), Heckelman et al.
patent: 4757503 (1988-07-01), Hayes et al.
patent: 4817093 (1989-03-01), Jacobs et al.
patent: 5051996 (1991-09-01), Bergeson et al.
patent: 5081297 (1992-01-01), Lebel et al.
patent: 5090015 (1992-02-01), Dabbish et al.
patent: 5107208 (1992-04-01), Lee
patent: 5179561 (1993-01-01), Izawa et al.
patent: 5260946 (1993-11-01), Nunally
patent: 5278841 (1994-01-01), Myers
patent: 5347519 (1994-09-01), Cooke et al.
patent: 5361264 (1994-11-01), Lewis
patent: 5425036 (1995-06-01), Lie et al.
patent: 5430734 (1995-07-01), Gilson
patent: 5475624 (1995-12-01), West
patent: 5488612 (1996-01-01), Heybruck
patent: 5508636 (1996-04-01), Mange et al.
patent: 5623501 (1997-04-01), Cooke et al.
Stroud et al.; Using ILA Testing for Bist in FPGAs; Intern. Test Conference; Oct. 20, 1996.
Stroud et al.; Bist-Based Diagnostics of FPGA Logic Blocks; International Test Conference; Nov. 3, 1997.

Affiliated with

Also associated with

Rating

Method of testing and diagnosing field programmable gate arrays does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of testing and diagnosing field programmable gate arrays, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of testing and diagnosing field programmable gate arrays will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-595427