Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2010-10-22
2011-11-01
Trimmings, John (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S731000, C714S715000, C714S025000, C714S030000, C714S042000, C714S048000, C714S719000, C714S733000, C714S734000, C714S735000, C714S736000, C714S742000, C365S201000, C330S255000, C330S051000, C326S086000, C327S397000
Reexamination Certificate
active
08051343
ABSTRACT:
Example embodiments relate to a method and system of testing a memory module having the process of receiving single ended input signals via differential input terminals through which differential pairs of packet signals may be received from a testing equipment, wherein a number of terminals of the testing equipment may be different from a number of terminals of the memory module, and testing memory chips of the memory module based on the single ended input signals.
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Han You-Keun
Seo Seung-Jin
Shin Seung-Man
So Byung-Se
Harness & Dickey & Pierce P.L.C.
Samsung Electronics Co,. Ltd.
Trimmings John
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