Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-04-27
2010-06-01
Pham, Thanh V (Department: 2894)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S692000, C438S197000
Reexamination Certificate
active
07727842
ABSTRACT:
A method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device. At least some of the illustrative embodiments are methods comprising forming a gate stack over a semiconductor substrate (the gate stack comprising a first polysilicon layer, a first nitride layer, and a second polysilicon layer), forming a second nitride layer over an active region in the semiconductor substrate adjacent to the gate stack, performing a chemical mechanical polishing that stops on the first nitride layer and on the second nitride layer, removing the first nitride layer and the second nitride layer, and performing a simultaneous silicidation of the first polysilicon layer and the active region.
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patent: 7148097 (2006-12-01), Yu et al.
patent: 7235472 (2007-06-01), Klee et al.
patent: 7410854 (2008-08-01), Yao et al.
patent: 2005/0037580 (2005-02-01), Nakajima et al.
patent: 2006/0105557 (2006-05-01), Klee et al.
Mehrad Freidoon
Tran Joe G.
Vitale Steven A.
Yu Shaofeng
Brady W. James
Henry Caleb
Keagy Rose Alyssa
Pham Thanh V
Telecky , Jr. Frederick J.
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