Method of relieving wafer stress

Details Method of relieving wafer stress Method of relieving wafer stress

2004-07-27

2009-08-18

Monbleau, Davienne (Department: 2893)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Multiple layers

C257SE21598, C257SE21599

Reexamination Certificate

active

07576013

ABSTRACT:
A method of relieving wafer stress is provided. A wafer is provided, wherein at least a dielectric layer has already formed over the wafer and the wafer has a first and a second area. At least no circuits are formed on the dielectric layer within the first area. Thereafter, openings are formed in the dielectric layer within the first area. A material layer is formed over the dielectric layer. Thus, pits are formed on the surface of the material layer at locations above the openings. Through the pits on the material layer, stress within the material layer is relieved and hence the amount of stress conferred to the wafer is reduced.

REFERENCES:
patent: 5189505 (1993-02-01), Bartelink
patent: 5401683 (1995-03-01), Sugahara
patent: 5447884 (1995-09-01), Fahey et al.
patent: 5622899 (1997-04-01), Chao et al.
patent: 5798568 (1998-08-01), Abercrombie et al.
patent: 6181569 (2001-01-01), Chakravorty
patent: 6571485 (2003-06-01), Yu et al.
patent: 6828211 (2004-12-01), Chi

Affiliated with

Also associated with

Rating

Method of relieving wafer stress does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of relieving wafer stress, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of relieving wafer stress will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4081108