Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2005-04-11
2008-07-22
Elms, Richard T (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S191000, C365S200000, C365S230080
Reexamination Certificate
active
07403431
ABSTRACT:
A method of reading a flash memory device wherein the status of a predetermined cell is read in such a way that a plurality of page buffers connected to a memory cell array through a plurality of bit lines are divided into at least two group, and the page buffers are sequentially driven on a group basis. A power loss problem caused by excessive current consumption occurring since all page buffers operate at the same time is avoided.
REFERENCES:
patent: 6813214 (2004-11-01), Cho et al.
patent: 7149112 (2006-12-01), Kim
patent: 7257047 (2007-08-01), Kim
patent: 2007/0223281 (2007-09-01), Park
patent: 01-141763 (1989-06-01), None
Elms Richard T
Hynix / Semiconductor Inc.
Luu Pho M.
Marshall & Gerstein & Borun LLP
LandOfFree
Method of reading a flash memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of reading a flash memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of reading a flash memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3965804