Method of producing semiconductor member

Details Method of producing semiconductor member Method of producing semiconductor member

2000-03-24

2002-10-22

Everhart, Caridad (Department: 2825)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Multiple layers

C438S455000

Reexamination Certificate

active

06468923

ABSTRACT:

BACKGROUND OR THE INVENTION
1. Field of the Invention
The present invention relates to a method of producing a semiconductor member and a method of utilizing it. Specifically, the present invention relates to a method of producing semiconductor wafers which are used for production of semiconductor devices such as micro processors, memories, logic circuits, system LSIs, solar cells, image sensors, light-emitting elements, display elements, etc., or which are monitor wafers to be used for film thickness monitoring at the time of film formation, etched-depth monitoring at the time of etching, particle monitoring to be used for detection of foreign matter particles as well as measurement of the number thereof, etc., dummy wafers to be disposed in treatment apparatuses for use in order to make good various treatment conditions such as film forming, heat treatment, doping, etching, etc.; and a method of using the wafers as well as a method of utilizing the wafers. Further, the present invention relates to a system of producing two kind of semiconductor wafers, a method of controlling production of the semiconductor wafers and a method of utilizing a deposited-film forming apparatus.
2. Related Background Art
Semiconductor wafers include wafers having layers of various semiconductor materials such as Si, GaAs, InP, GaN, etc. Among others, an SOI wafer which has a semiconductor layer on a supporting substrate having an insulating surface catches attention as a wafer appropriate for production of semiconductor devices capable of high speed operation with low power consumption.
The SOI wafers include known SIMOX wafers subjected to an oxygen ion implanting step and a heat treatment step, bonding wafers subjected to a hydrogen ion implanting step and a peeling step which are described in Japanese Patent Application Laid-Open No. 5-211128 (U.S. Pat. No. 5,374,564) and Japanese Patent Application Laid-Open No. 10-200080 (U.S. Pat. No. 5,966,620), and bonding wafers using plasma etching described in International Application Publication No. WO
98
/
52216
, etc. In addition, as a production method for excellent SOI wafers, a method of transferring an epitaxial layer another supporting substrate material is proposed in Japanese Patent Application Laid-Open No. 2608351 (U.S. Pat. No. 5,371,037).
Moreover, an improved method for transferring an epitaxial layer is proposed in Japanese Patent Application Laid-Open No. 7-302889 (U.S. Pat. No. 5,856,229). This method will be specifically described below.
FIGS. 19A
to
19
E are schematic views showing a method of transferring an epitaxial layer which is described in Japanese Patent Application Laid-Open No. 7-302889.
Firstly, as shown in
FIG. 19A
, an Si wafer
1
is prepared as a first wafer (which in some cases is called as prime wafer, bond wafer, device wafer, seed wafer, donor wafer, etc.), and a surface layer thereof subjected to anodization and made porous to form a porous layer
4
.
Next, as shown in
FIG. 19B
, a CVD method, etc. is applied to epitaxially grow a non-porous single-crystalline semiconductor layer
5
on the porous layer
4
.
Moreover, as shown in
FIG. 19C
, a surface of the non-porous single-crystalline semiconductor layer
5
is oxidized to form an insulating layer
6
. The insulating layer
6
is bonded onto a surface of a separately prepared second wafer
2
(Si wafer or silica glass, etc.). Thus a multilayer structure
100
having the non-porous single-crystalline semiconductor layer
5
inside is obtained.
As shown in
FIG. 19D
, when a wedge is struck into a side surface of this multilayer structure
100
or when external force or internal stress is applied so as to separate the multilayer structure, the multilayer structure
100
is divided at a porous layer portion (reference numerals
41
and
42
in
FIG. 19D
denote separated porous layers).
A porous layer
42
left on a surface of the non-porous single-crystalline semiconductor layer
5
, i.e., an epitaxial layer which is transferred onto the above-described second wafer
2
(which are referred to as a handle wafer or a base wafer, etc., in some cases) is subjected to wet etching with a mixed liquid of fluoric acid and hydrogen peroxide solution to be removed.
In addition, as shown in
FIG. 19E
, an exposed surface of the epitaxial layer is flattened by hydrogen annealing, etc. to complete an SOI wafer.
On the other hand, since a separated Si wafer
1
maintains its shape as a wafer, a porous layer left on its separation surface is etched with the above-described mixed liquid, etc. and polished, and the separated wafer can be used so as to produce another SOI wafer as the first wafer shown in
FIG. 19A
again.
Alternatively, the separated wafer can be used as a second wafer
2
shown in
FIG. 19B
so as to produce another SOI wafer.
As described above, the above-described Japanese Patent Application Laid-Open No. 7-302889 describes that the peeled Si wafer
1
is used as the first wafer shown in
FIG. 19A
or the second wafer
2
shown in FIG.
19
B.
However, the above-described method has several potential problems to be solved.
That is, it is desirable that a number of SOI wafers are produced using less sheets of wafer as much as possible, but one wafer subjected to a plurality of uses in production steps of SOI wafers is finally discarded. This will not be adjusted to industry in the near future when decrease of wastes generation and efficient use of resources will be expected.
In addition, in the case where an Si wafer is reused some times as the first wafer, the first wafer loses its film thickness every time of reuse due to a step of making a wafer porous and a step of removing a porous layer after separation. Accordingly, in the case where the,wafer is reused some times, difference in thickness of a wafer not reused and the above-described reused wafer becomes remarkable. In such a case where the, wafer is subjected to a treatment step depending on thickness of wafers again as in step of making a wafer porous, significant difference in thickness for respective wafers will presumably make setting or adjustment of various treatment conditions time-consuming.
In addition, when a multilayer structure is formed, the thickness of the first wafer sensitively affects wrap of the multilayer structure in some cases.
Further, it is considered that damages stored due to the repeated separation steps adversely affect the subsequent step of making a wafer porous and the like, whereby SOI wafers having desired characteristics are not obtained.
That is, in conventional reuse method, it is only considered that a reusable first wafer obtainable by SOI wafer-producing steps is repeatedly used in the same SOI wafer producing steps, and therefore the above-described problems are considered.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of producing semiconductor wafers having efficient and economical application mode of wafers.
In addition, another object of the present invention is to provide a semiconductor wafer-producing system which enables efficient and economical application of semiconductor wafers.
A method of producing a semiconductor wafer according to the present invention comprises a first step of forming a first member having a non-porous layer on a semiconductor substrate, and a second step of separating the non-porous layer from the first member and transferring the non-porous layer onto a second member, wherein use of the semiconductor substrate from which the non-porous layer is separated in the second step as a constituent material of the first member in the first step is conducted (n−1) times (“n” is a natural number not less than 2), the first and second steps are repeated n times, the semiconductor substrate is separated in n-th use in the second step and the separated semiconductor substrate is used for an use other than that of the first and second steps. The first member can be formed the non-porous layer on the semiconductor substrate through a separation layer.
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