Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
Reexamination Certificate
2002-04-05
2004-11-02
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having junction gate
C438S195000, C438S199000, C438S188000, C438S721000
Reexamination Certificate
active
06812080
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates to production of a semiconductor device and, more particularly, to a method of producing a semiconductor device which requires a fine gate electrode.
DESCRIPTION OF THE RELATED ART
In recent years, large-scale integration of semiconductor devices and reduction of the design rules have remarkably progressed, and simultaneously, the gate electrodes of MOSFETS and the like have been required to have a fine size. A polysilicon layer is formed on an Si substrate via a gate oxide film, and the gate oxide film is patterned. In this case, the gate electrode is formed utilizing photolithography. The tolerance of dispersion in size has become more severe with the requirement for a so-called “half•micron” or “quarter•micron” size.
FIG. 3
is a cross-sectional view for illustrating patterning of a polysilicon gate electrode according to a conventional method of producing a semiconductor device. A polysilicon layer
33
is formed on an Si substrate
31
via a gate oxide film
32
. A resist layer
35
for a photolithographic process is formed on the polysilicon layer
33
. In this case, practically, a natural oxide film
34
is present on the polysilicon layer
33
. Thus, the resist layer
35
is coated onto the natural oxide film
34
on the polysilicon layer
33
, followed by patterning.
In the case in which the polysilicon layer is patterned by the photolithographic process while the natural oxide film is present on the polysilicon layer, the patterning size of the resist layer varies depending on the state of the natural oxide film. Thus, the etching size of the polysilicon after the processing also varies. After all, the dispersion in size of the gate electrode becomes remarkable. Thus, the dispersion may depart from a required tolerance in size of the gate electrode.
In view of the above-described situations, the present invention has been devised, and an object of the present invention is to provide a method of producing a semiconductor device by which the dispersion in size of the gate electrode can be reduced.
SUMMARY OF THE INVENTION
The method of producing a semiconductor device of the present invention which includes a process of patterning a gate electrode on a polysilicon layer formed on an Si wafer using photolithography is characterized in that the patterning process contains a process of removing a natural oxide layer formed on the polysilicon layer as a pre-treatment for coating a resist by the photolithography. Also, the method of producing a semiconductor device of the present invention is characterized in that the process of removing the natural oxide film uses fluorine or a fluorine-containing compound.
According to the method of producing a semiconductor device of the present invention, the natural oxide film having an arbitrary thickness formed on the polysilcon layer is removed before the resist is coated. Thereby, the uniform state on the whole surface of the polysilicon layer is obtained.
REFERENCES:
patent: 5925931 (1999-07-01), Yamamoto
patent: 6025267 (2000-02-01), Pey et al.
patent: 06-021091 (1992-07-01), None
patent: 09-023003 (1995-07-01), None
patent: 09-223796 (1996-02-01), None
Berry Renee R.
Harness & Dickey & Pierce P.L.C.
Nelms David
Seiko Epson Corporation
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