Method of producing MOS transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S305000, C438S592000, C438S596000

Reexamination Certificate

active

06410392

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of producing a MOS transistor having a salicide (self-aligned silicide) structure.
2. Description of the Related Art
FIGS.
5
(
a
)-
5
(
b
) and FIGS.
6
(
a
)-
6
(
c
) are sectional views showing a conventional method of producing a MOS transistor having a salicide structure, in the order of steps.
In the case of producing a MOS transistor having a salicide structure by a conventional method, first, a gate oxide film
3
is formed on an active region (-the region free of field oxide film) of a silicon substrate
2
on which a field oxide film
1
has been formed. Then, a gate electrode
7
having a two-layer structure consisting of a polysilicon film
5
and a metal silicide film
6
with a silicon oxide film
4
on top thereof is formed on the gate oxide film
3
(FIG.
5
(
a
)).
Thereafter, a silicon nitride film is built up on the entire surface, and is subjected to anisotropic etching to form a side wall spacer
8
on side walls of the gate electrode
7
(FIG.
5
(
b
)). In this case, those portions of the gate oxide film
3
which are not covered by the gate electrode
7
or the side wall spacer
8
are also etched away, leaving the gate oxide film
9
beneath the gate electrode
7
and the side wall spacer
8
.
Thereafter, a diffusion layer
10
is formed in the surface layer of the silicon substrate
2
(FIG.
5
(
c
)).
Then, a metal film consisting of cobalt, titanium or the like is built up on the entire surface, and silicidizing process is carried out to form a metal silicide layer
12
consisting of cobalt silicide (CoSi2), titanium silicide (TiSi2) or the like on the diffusion layer
10
(FIG.
6
(
a
)).
Thereafter, an inter-layer insulation film
14
is formed, and a contact hole
15
overlapping the side wall spacer
8
is formed in the inter-layer insulation film
14
(FIG.
6
(
b
)).
Then, a barrier metal film
16
and a metallic plug
17
are formed in the contact hole
15
. Thereafter a metallic wiring
18
is formed on the inter-layer insulation film
14
(
FIG. 6
(
c
)).
In this-manner, a MOS transistor having a salicide structure is produced.
While the method of producing a MOS transistor according to the prior art comprises the above-mentioned steps and the metal silicide layer
12
is formed on the diffusion layer
10
to thereby reduce the resistance of the diffusion layer
10
, there is the problem that the resistance of the diffusion layer
10
increases where the width W of the diffusion layer
10
is reduced to or below 0.35 m.
In addition, since the contact hole
15
is formed so as to overlap the side wall spacer
8
by a self-alignment process, the area of contact with the diffusion layer
10
is reduced by the amount of overlap between the contact hole
15
and the side wall spacer
8
and, therefore, there is the problem that the contact resistance is increased.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a method of producing a MOS transistor having a salicide structure in which the resistance of a diffusion layer and contact resistance are low.
A method of producing MOS transistor according to the present invention comprises the steps of: forming a gate electrode on a gate oxide film formed on a silicon substrate, forming a side wall spacer on a side wall of the gate electrode after the formation of the gate electrode, forming a diffusion layer in a surface layer of the silicon substrate after the formation of the side wall spacer, forming a silicon film on the side wall spacer after the formation of the diffusion layer, building up a metal film after the formation of the silicon film and performing a heat treatment to form a metal silicide layer on the diffusion layer and the side wall spacer, and forming an inter-layer insulation film after the formation of the metal silicide layer and providing the inter-layer insulation film with a contact hole overlapping the side wall spacer.
A method of producing MOS transistor according to the present invention is characterized in that the step of forming the silicon film on the side wall spacer comprises a step of sputter etching the exposed surface of the silicon substrate.
A method of producing MOS transistor according to the present invention is characterized in that the amount of etching of the surface of the silicon substrate is not less than 100 Å.
A method of producing MOS transistor according to the present invention is characterized in that the step of forming the silicon film on the side wall spacer comprises the steps of building up a silicon film covering the gate electrode and the side wall spacer, and subjecting the silicon film to anisotropic etching after the building up of the silicon film.


REFERENCES:
patent: 5920783 (1999-07-01), Tseng et al.
patent: 6077763 (2000-06-01), Chen et al.
patent: 6180477 (2001-01-01), Liao
patent: 6274446 (2001-08-01), Agnello et al.
patent: 6335248 (2002-01-01), Mandelman et al.
patent: 2001/0010962 (2001-08-01), Chen et al.
patent: A 8-64691 (1996-03-01), None
patent: A 11-74270 (1999-03-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of producing MOS transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of producing MOS transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of producing MOS transistor will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2923911

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.