Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1993-11-01
2001-08-07
Quach, T. N. (Department: 2814)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S646000, C438S660000
Reexamination Certificate
active
06271137
ABSTRACT:
1. TECHNICAL FIELD
The present invention relates generally to semiconductor integrated circuit processing, and more specifically to producing an aluminum stacked contact/via for multilayer interconnections.
2. DESCRIPTION OF THE PRIOR ART
Metal films are used extensively in the field of semiconductor integrated circuit fabrication for surface wiring. The metallization process of wiring components together begins with etching contact openings or vias through the various layers down to the active regions within a semiconductor substrate, or to contact an underlying polycrystalline silicon or a metal interconnect layer. A conductive metal is then deposited over the surface of the wafer in a manner that provides good contact with the underlying active device. Increasing chip density and smaller geometries have decreased the available area for surface wiring. Multilevel metal arrangements have solved part of this problem.
Because of its physical properties, aluminum is especially well suited for fabrication of metal interconnects. Among the properties which make aluminum so useful is the fact that it is very conductive, it forms a good mechanical bond with various dielectric layers generally used in the semiconductor industry, and it makes a good ohmic contact with both N and P type semiconductors. However, the sputtering process used to apply aluminum thin film layers to an integrated circuit generally results in less than ideal filling of contact vias. Large aluminum grains tend to form on the upper surface of the insulating layer. These grains which form at the edges of the contact via tend to block the contact opening before the aluminum has a chance to completely fill the contact via. This blockage produces a thinner layer of aluminum along the sides of the insulating layer, increasing the current density through that part of the contact opening and resulting in voids and uneven structures within the via. This problem is enhanced as circuit devices are fabricated using smaller geometries.
The uneven thickness of the aluminum layer going into the via, caused by the step coverage problem described above, has an adverse impact on device functionality. If the voids in the via are large enough, contact resistance can be significantly higher than desired. In addition, the thinner regions of the aluminum layer will be subject to the well known electromigration problem. This problem can cause eventual open circuits at the contacts and premature failure of the devices. The devices must be designed so that the current density in the aluminum interconnect lines does not become high enough to cause rapid electromigration. The thinner regions of the aluminum layer tend to occur over abrupt height changes on the surface of the integrated circuit.
Many approaches have been used to try to ensure good metal contact to lower interconnect levels. For example, refractory metal layers have been used in conjunction with the aluminum interconnect layer to improve conduction through a via. Sloped via sidewalls have been used to improve metal filling in the via. The use of sloped sidewalls is becoming less common as device sizes shrink because they consume too much area on a chip.
Even with these techniques, the problems of completely filling a via with aluminum are not solved. In part, this is due to the fact that aluminum is deposited at a temperature which tends to encourage fairly large grain sizes. Voids and other irregularities within the contact continue to be problems with current technologies.
One technique which has been proposed to overcome the via filling problem is to deposit the aluminum interconnect layers at a temperature between 500 degrees C. and 550 degrees C. At these temperatures, the liquidity of the aluminum is increased, allowing it to flow down into the vias and fill them. This technique is described, for example, in DEVELOPMENT OF A PLANARIZED Al—Si CONTACT FILLING TECHNOLOGY, H. Ono et al, June 1990 VMIC Conference proceedings, pages 76-82. At temperatures below 500 degrees C. and above 550 degrees C. result in degraded metal filling of contact vias. It is believed that use of such technique still suffers from problems caused by large grain sizes.
It would be desirable to provide a technique for manufacturing integrated circuits whereby contact openings are completely filled improving coverage in contact vias. It is further desirable that such a technique be compatible with current standard process flows.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a semiconductor fabrication technique for forming an aluminum contact on an integrated circuit.
It is another object of the present invention to provide such a method in which aluminum fills the contact via while eliminating voids being formed therein.
It is a further object of the present invention to provide such a method which is suitable for use at one micron and submicron geometries.
It is yet another object of the present invention to provide such a method which is compatible with current process technology.
Therefore, according to the present invention, a method is provided for depositing improved quality aluminum thin film interlevel contacts in a semiconductor integrated circuit. A contact opening is formed through an insulating layer. A barrier layer is deposited over the surface of the integrated circuit chip. An aluminum layer is deposited at relatively low deposition rates at a temperature which allows improved surface migration of the deposited aluminum atoms. Aluminum deposited under these conditions tends to fill contact vias without the formation of voids. The low temperature deposition step can be initiated by deposition aluminum while a wafer containing the integrated circuit device is being heated from cooler temperatures within the deposition chamber. Formation of the aluminum contact under these conditions helps to fill the contact opening and provide a smooth upper contour to the deposited aluminum layer so that additional aluminum contacts may be formed on top of the first aluminum contact.
REFERENCES:
patent: 3158504 (1964-11-01), Anderson
patent: 3900598 (1975-08-01), Hall et al.
patent: 4107726 (1978-08-01), Schilling
patent: 4436582 (1984-03-01), Saxena
patent: 4502209 (1985-03-01), Eizenberg et al.
patent: 4566177 (1986-01-01), van de Ven et al.
patent: 4592802 (1986-06-01), Deleonibus et al.
patent: 4661228 (1987-04-01), Mintz
patent: 4756810 (1988-07-01), Lamont et al.
patent: 4759533 (1988-07-01), Magee et al.
patent: 4772571 (1988-09-01), Scovell et al.
patent: 4837183 (1989-06-01), Polito et al.
patent: 4892844 (1990-01-01), Cheung et al.
patent: 4944961 (1990-07-01), Lu et al.
patent: 4970176 (1990-11-01), Tracy et al.
patent: 4975389 (1990-12-01), Ryan et al.
patent: 4976839 (1990-12-01), Inoue
patent: 4988423 (1991-01-01), Yamamoto et al.
patent: 4994162 (1991-02-01), Armstrong
patent: 5106781 (1992-04-01), DeVries
patent: 5108570 (1992-04-01), Wang
patent: 5108951 (1992-04-01), Chen et al.
patent: 0 107 259 A3 (1984-05-01), None
patent: 0 132 720 A1 (1985-02-01), None
patent: 0 137 701 A1 (1985-04-01), None
patent: 0 168 828 A2 (1986-01-01), None
patent: 0 257 277 A2 (1988-03-01), None
patent: 0 269 019 A3 (1988-06-01), None
patent: 0 273 715 A2 (1988-07-01), None
patent: 0 276 087 A2 (1988-07-01), None
patent: 0 310 108 A2 (1989-04-01), None
patent: 0 329 227 A1 (1989-08-01), None
patent: 0 351 001 A1 (1990-01-01), None
patent: 0 488 628 A2 (1990-11-01), None
patent: 0 430 403 A2 (1991-06-01), None
patent: 0 451 571 A2 (1991-10-01), None
patent: 0 488 264 A3 (1992-06-01), None
patent: 0 499 241 A1 (1992-08-01), None
patent: 2 112 566 (1983-07-01), None
patent: 2 128 636 (1984-05-01), None
patent: 54-71564 (1979-08-01), None
patent: 57-139939 (1982-08-01), None
patent: 58-46641 (1983-01-01), None
patent: 60-227446 (1985-11-01), None
patent: 61-142739 (1986-06-01), None
patent: 63-124447 (1988-05-01), None
patent: 63-136547 (1988-06-01), None
patent: 2-137230 (1988-11-01), None
patent: 1-160036 (1989-06-01), None
patent: 1-077122 (1989-09-01), None
Chen Fusen E.
Liou Fu-Tai
Galanthay Theodore E.
Jorgensen Lisa K.
Quach T. N.
STMicroelectronics Inc.
Venglarik Daniel V.
LandOfFree
Method of producing an aluminum stacked contact/via for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of producing an aluminum stacked contact/via for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of producing an aluminum stacked contact/via for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2524338