Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-02-10
2000-09-05
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438272, 257328, 257329, 257330, 257335, H01L 29792
Patent
active
061142077
ABSTRACT:
In a semiconductor device having a substrate, a p-type semiconductor layer, an n-type channel well region, a p-type lightly doped source region, and a source electrode formed on the substrate in this order, a p-type heavily-doped source region, an impurity concentration of which is higher than that of the lightly-doped source region, is formed in a surface region of the lightly-doped source region. The source electrode is formed to contact the heavily-doped source region. As a result, a punch through phenomenon between the p-type source region and the p-type semiconductor layer through the n-type channel well region can be prevented without increasing in the On resistance of the semiconductor device.
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Dialog File 347: JAPIO English Abstract of JP56-96865, Aug. 1981.
Kataoka Mitsuhiro
Okabe Yoshifumi
Tomatsu Yutaka
Blum David S
Bowers Charles
Denso Corporation
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