Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-01-03
2003-05-06
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S239000, C438S240000, C438S241000, C438S381000, C438S003000, C257S295000
Reexamination Certificate
active
06559003
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a method of producing a semiconductor component. In particular, the present invention relates to a method of producing a non-volatile memory cell with a switching transistor and a storage capacitor. The capacitor has plates which contain a platinum metal and a ferroelectric or paraelectric material is inserted between the plates as a dielectric.
Conventional microelectronic semiconductor memory components (DRAMs) essentially include a selection transistor or switching transistor and a storage capacitor, in which a dielectric material is inserted between two capacitor plates. Usually oxide or nitride layers which have a maximum dielectric constant of approximately 8 are mostly used as the dielectric. “Novel” capacitor materials (ferroelectrics or paraelectrics) with distinctly higher dielectric constants are required for reducing the size of the storage capacitor and for producing non-volatile memories. Some of those materials are named in a publication entitled “Neue Dielektrika für Gbit-Speicherchips” [New Dielectrics for Gbit Memory Chips] by W. Hönlein. Phys. Bl. 55 (1999). Ferroelectric materials, such as SrBi
2
(Ta,Nb)
2
O
9
(SBT or SBTN), Pb (Zr,Ti)O
3
(PZT), or Bi
4
Ti
3
O
12
(BTO), may be used as the dielectric between the capacitor plates for producing ferroelectric capacitors for applications in non-volatile memory components with high integration density. However, a paraelectric material, such as, for example, (Ba,Sr)TiO
3
(BST), may also be used.
However, the use of those novel dielectrics, ferroelectrics or paraelectrics presents semiconductor process technology with new challenges. Firstly, those novel materials can no longer be combined with the traditional electrode material of polycrystalline silicon. Therefore, inert electrode materials such as, for example, platinum metals or their conductive oxides (for example RuO
2
), must be used. The reason for that is that, after the ferroelectric material has been deposited, it has to be annealed (“conditioned”), possibly several times, in an oxygen-containing atmosphere at temperatures of approximately 550-800° C. In order to avoid undesired chemical reactions of the ferroelectric material with the electrodes, the latter are therefore mostly made from platinum or some other adequately temperature-stable and inert material, such as another platinum metal (Pd, Ir, Rh, Ru, Os).
Process steps which take place in a hydrogen-containing atmosphere are necessary for the integration of the storage capacitors. For example, for the conditioning of the metallization and of the transistors, annealing in forming gas which is composed of 95% nitrogen (N
2
) and 5% hydrogen (H
2
) is necessary. However, the penetration of hydrogen into the processed storage capacitor, i.e. into the dielectric, may lead to a degradation of the oxidic ceramics of the dielectric due to reduction reactions. Furthermore, the plasma-enhanced deposition of intermetal oxides (PECVD) or of the silicon nitride passivation layer may bring about a reduction of the ferroelectric or paraelectric material of the dielectric due to the high hydrogen content in the layers.
In the prior art, it has until now been attempted to solve the problem by depositing a passivation layer onto the storage capacitor. In U.S. Pat. No. 5,523,595, for example, a description is given of a method of manufacturing a semiconductor device in which a switching transistor is formed in a semiconductor substrate, a first insulating layer is deposited on the switching transistor, a ferroelectric storage capacitor coupled to the switching transistor is formed on the first insulating layer, a second insulating layer is applied above the storage capacitor and a barrier layer of TiON, resisting hydrogen penetration, is deposited on the second insulating layer. That previously known barrier layer has the effect of preventing the penetration of hydrogen through the upper electrode of the storage capacitor. However, diffusion of hydrogen through the first insulating layer, and of the lower electrode into the dielectric, continues to be possible and can consequently lead to a degradation of the storage capacitor. On the other hand, it is not possible to dispense with the hydrogen content in the forming gas, since free bonds (“dangling bonds”) in the semiconductor, in particular at the interfaces with the electrodes, and in the gate oxide are to be saturated by the hydrogen. In that situation, diffusion of the hydrogen through the lower electrode of the storage capacitor and subsequent damage to the ferroelectric cannot be ruled out.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method of producing a semiconductor memory, which overcomes the hereinafore-mentioned disadvantages of the heretofore-known methods of this general type and in which a storage capacitor that uses a ferroelectric or paraelectric material for a dielectric can be adequately protected against penetration of hydrogen.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method of producing a semiconductor component, which comprises:
a) forming a switching transistor on a semiconductor substrate;
b) embedding a first barrier layer, in particular resisting penetration of hydrogen, in an insulating layer and applying the insulating layer to the switching transistor;
c) forming a storage capacitor of a lower electrode, an upper electrode and a metal-oxide-containing layer deposited between the lower and upper electrodes, coupling the storage capacitor to the switching transistor and applying the storage capacitor to the insulating layer;
d) removing the insulating layer to a certain depth outside the storage capacitor in a vertical etching step, while exposing the first barrier layer to the outside; and
e) applying a second barrier layer, in particular resisting penetration of hydrogen, to the storage capacitor, to the insulating layer and to the first barrier layer.
The metal-oxide-containing layer in this case is preferably a ferroelectric or paraelectric material.
In accordance with another mode of the invention, the switching transistor is connected to the storage capacitor in such a way that, after the insulating layer is applied, a contact hole is etched into the latter as far as a terminal region of the switching transistor, for example a drain region of an MOS switching transistor, and is filled with a conductive material, and the lower electrode of the storage capacitor is subsequently applied at least partially to the contact hole.
In accordance with a further mode of the invention, before the contact hole is filled, it is lined on its inner wall surfaces with a third barrier layer, in particular resisting the penetration of hydrogen. As a result, the hydrogen can additionally be prevented from diffusing into the contact hole filled with the conductive material (“plug”) and penetrating through the conductive material of the contact hole and the lower electrode into the metal-oxide-containing layer. Consequently, the storage capacitor being produced is completely encapsulated by barrier layers.
In accordance with an added mode of the invention, in step d), the first insulating layer is removed to the depth of the first barrier layer, and it is possible, if appropriate, for the first barrier layer to be used as an etching stop layer. As an alternative to this, also in step d), the first insulating layer may be removed to a depth below the first barrier layer.
In accordance with an additional mode of the invention, the first barrier layer is produced from Si
3
N
4
, and a chemical gas phase deposition at low pressure (LPCVD) produces particularly good results. ZrO
2
or SiO
2
/ZrO
2
may also be chosen as the material of the first barrier layer. The materials which are known per se in the prior art Al
2
O
3
, TiO
2
, Ta
2
O
5
may also be used as the material for the first barrier layer.
In accordance with yet another mode of the invention, in order to prov
Dehm Christine
Hartner Walter
Kastner Marcus
Schindler Günther
Greenberg Laurence A.
Guerrero Maria
Infineon - Technologies AG
Mayback Gregory L.
Stemer Werner H.
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