Semiconductor device manufacturing: process – With measuring or testing
Patent
1998-11-02
2000-09-19
Booth, Richard
Semiconductor device manufacturing: process
With measuring or testing
118725, 165253, 392418, 392416, H01L 2166, G01R 3126
Patent
active
061210617
ABSTRACT:
A method is provided for treating wafers on a low mass support. The method includes mounting a temperature sensor in proximity to the wafer, which is supported on the low mass support, such that the sensor is only loosely thermally coupled to the wafer. A temperature controller is programmed to critically tune the wafer temperature in a temperature ramp, though the controller directly controls the sensor temperature. A wafer treatment, such as epitaxial silicon deposition, is started before the sensor temperature has stabilized. Accordingly, significant time is saved for the treatment process, and wafer throughput improved.
REFERENCES:
patent: 3560252 (1971-02-01), Kennedy
patent: 3615931 (1971-10-01), Arthur, Jr. et al.
patent: 3641974 (1972-02-01), Yamada et al.
patent: 3796099 (1974-03-01), Shimotsuma et al.
patent: 3969943 (1976-07-01), Ohno et al.
patent: 4001586 (1977-01-01), Fraioli
patent: 4435092 (1984-03-01), Iuchi
patent: 4456919 (1984-06-01), Tomita et al.
patent: 4496609 (1985-01-01), McNeilly et al.
patent: 4564416 (1986-01-01), Homma et al.
patent: 4607591 (1986-08-01), Stitz
patent: 4698486 (1987-10-01), Sheets
patent: 4728389 (1988-03-01), Logar
patent: 4764026 (1988-08-01), Powell et al.
patent: 4789771 (1988-12-01), Robinson et al.
patent: 4821674 (1989-04-01), deBoer et al.
patent: 4836138 (1989-06-01), Robinson et al.
patent: 4854727 (1989-08-01), Pecot et al.
patent: 4890245 (1989-12-01), Yomoto et al.
patent: 4913790 (1990-04-01), Narita et al.
patent: 4919542 (1990-04-01), Nulman et al.
patent: 4969748 (1990-11-01), Crowley et al.
patent: 4978567 (1990-12-01), Miller
patent: 4984902 (1991-01-01), Crowley et al.
patent: 4996942 (1991-03-01), deBoer et al.
patent: 5002630 (1991-03-01), Kermani et al.
patent: 5011789 (1991-04-01), Burns
patent: 5063031 (1991-11-01), Sato
patent: 5098198 (1992-03-01), Nulman et al.
patent: 5156461 (1992-10-01), Moslehi et al.
patent: 5205871 (1993-04-01), Godbey et al.
patent: 5221412 (1993-06-01), Kagata et al.
patent: 5225245 (1993-07-01), Ohta et al.
patent: 5359693 (1994-10-01), Nenyei et al.
patent: 5373806 (1994-12-01), Logar
patent: 5377126 (1994-12-01), Flik et al.
patent: 5445675 (1995-08-01), Kubodera et al.
patent: 5446825 (1995-08-01), Moslehi et al.
patent: 5471947 (1995-12-01), Southworth et al.
patent: 5514439 (1996-05-01), Sibley
patent: 5549756 (1996-08-01), Sorensen et al.
patent: 5578521 (1996-11-01), Suzuki et al.
patent: 5593608 (1997-01-01), Suzuki
patent: 5650082 (1997-07-01), Anderson
patent: 5678989 (1997-10-01), Okase
patent: 5707146 (1998-01-01), Gaus et al.
patent: 5743644 (1998-04-01), Kobayashi et al.
patent: 5809211 (1998-09-01), Anderson et al.
patent: 5968587 (1999-10-01), Frankel
Layton Jason Mathew
Raaijmakers Ivo
Van Bilsen Franciscus Bernardus Maria
ASM America Inc.
Booth Richard
Murphy John
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