Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-04-26
2004-03-09
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S710000
Reexamination Certificate
active
06703301
ABSTRACT:
DESCRIPTION OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of preventing the corrosion of tungsten plugs during semiconductor device fabrication processes.
2. Background of the Invention
As semiconductor device dimensions shrink, it has become necessary to conserve area on the semiconductor wafer surface, especially during the real-estate consuming process of fabricating several stacked layers of interconnect wires (metallization levels). In many ways, device density on a chip is now interconnect-limited. In previous years, when device dimensions (and hence interconnect wires) were larger, wires usually completely covered the underlying tungsten (W) plugs (referred to hereinafter as either a “tungsten plug” or a “W plug”) at their contact point, and corrosion of the tungsten was a concern only when misalignment of an optical projection lithography stepper resulted in a patterned wire layer not aligned squarely over the top of a given W plug. Now, because of ever-shrinking device dimensions (and the need for tighter control over interconnect wire size), wire layers are often purposefully formed so that they do not completely cover an underlying W plug. As such, the corrosion of W plugs and the overlying wires are still a concern in the fabrication process.
Generally, after forming a W plug, a wire is formed to couple with the W plug. This wire material has typically been Al-(0.5 wt %-1.5 wt %)Cu. Although in the last few years, as device dimensions shrink below the 0.18 &mgr;m design rule, Cu wiring materials have been replacing Al-based alloys as the multi-level interconnect material of choice.
FIG. 1
is a cross-sectional view (not to scale) of a partially-processed semiconductor device according to the prior art, showing a substrate
10
, interlevel dielectric material
11
, a “glue layer” or adhesion layer
12
comprising TiN, TiW, or other barrier material, tungsten (W) plug
13
, polymeric resist (photoresist) material
14
for pattern definition, metal wire
15
, and a polymeric residue (etch byproduct)
17
. The interconnect wire
15
, as shown, does not completely cover the underlying W plug
13
. This patterned wire
15
may be accidentally misaligned over the W plug
13
, or purposefully formed to cover only part of the W plug
13
(to conserve chip area). It will be understood by those skilled in the art that the cross-sectional views presented in all the drawings omit several known components of a semiconductor device/integrated circuit (IC) for the purposes of clarity.
FIG. 2
is a cross-sectional view (not to scale) of a partially-processed semiconductor device according to
FIG. 1
, showing some polymeric material
14
(
FIG. 1
) (which has been generated from dry etching) remaining as polymeric residue
17
after a dry etching step. The exposed portion
16
of W plug
13
is evident adjacent to the polymeric residue
17
. While performing this oxygen plasma etching process to ash the photoresist
14
and pattern interconnect wire
15
, some residual photoresist or other polymeric residue
17
is inevitably left behind and remains adhered to the side surfaces of patterned wire
15
and photoresist
14
. This polymeric residue
17
must be removed before the fabrication process can continue. The oxygen plasma etching step described above is typically performed to remove photoresist material
14
, followed by a wet-cleaning process utilizing a stripping solution (e.g. EKC-265™ from EKC Technology Inc. of Hayward, Calif.) with a conventional pH of about 10-12 to remove polymeric residue
17
.
In a case, such as that described above, where interconnect wire
15
is misaligned over W plug
13
, or in a case where interconnect wire
15
is purposefully patterned to incompletely cover W plug
13
, a portion
16
of the W plug
13
surface is exposed during subsequent processing steps.
As shown in
FIG. 3
(a cross-sectional view (not to scale) of a partially-processed semiconductor device according to the prior art), W plug
13
corrosion occurs during the standard wet-stripping process used to remove remaining polymeric residue
17
from wire
15
.
While the wet-cleaning process is performed with stripping solution
19
to remove polymeric residue
17
on the sides of patterned metal wire
15
, the exposed portion of W plug
13
is corroded by stripping solution
19
and a hole
18
is formed in W plug
13
. This tungsten corrosion is caused by charges (“q”)
20
accumulated on the surface of interconnect wire
15
either while performing the interconnect wire
15
etching process to pattern said wire
15
, or when oxygen plasma ashing the photoresist
14
. The charged wire and W plug
13
exhibit a large electrical potential between them (the two dissimilar metals have different electrochemical potentials and essentially form a galvanic couple). As a result, the exposed tungsten is oxidized to an ionic state
21
(WO
4
−2
, for example) by the stripping solution
19
, which has a pH value conventionally from 10 to 12. The exposed tungsten is stripped from the surface of W plug
13
during this wet-cleaning process, resulting in the abovementioned hole
18
.
FIG. 4
is a cross-sectional view (not to scale) of a partially-processed semiconductor device according to the prior art, showing the W plug
13
corrosion hole
18
after the standard wet-stripping process discussed above and illustrated in FIG.
3
. Because the area of contact between W plug
13
and patterned metal wire
15
is reduced by corrosion of W plug
13
, electrical resistance is increased in the wiring lines and this inevitably leads to catastrophic failure of the integrated circuit (IC).
The conventional prior art solution to the abovementioned corrosion problem is to dip a partially-processed substrate into a neutral ionic solution (e.g. electrolyte) or deionized water for several hours, and then to perform the wet cleaning process with the stripping solution. By dipping the substrate into a neutral ionic solution, the charges (q) accumulated on the wire surface are effectively discharged. Nevertheless, while this protects W plug
13
from electro-galvanic corrosion, interconnect wire
15
on top of W plug
13
is instead corroded by the neutral ionic solution (i.e. the metal in wiring
15
reacts with the salts/electrolytes in the neutral ionic solution). As wire dimensions continue to shrink, preventing corrosion of the wire is important along with preventing corrosion of W plug
13
, for reasons already mentioned. Furthermore, after the substrate dipping step, a separate rinse-dry step is required for this method to remove any residual solution (i.e. salts/electrolytes) from the substrate.
Therefore, the present invention provides a method of preventing W plugs and metal wires from corrosion during semiconductor device fabrication. According to the present invention, the method comprises steps of providing a W plug formed in a substrate and coupled with a wire formed on the substrate. The substrate is then dipped into a non-ionic benign solvent, such as pure isopropyl alcohol (IPA) or pure N-methyl pyrrolidone (NMP), and a rinse process is performed to clean a surface of the wire. Then, the substrate is spin-dried and a conventional wet-stripping process is performed.
This invention uses the IPA or NMP solvents to discharge the electrical charges (q) accumulated on the wire, thereby preventing the W plugs from electro-galvanic corrosion. Once the charge accumulated on the wire is discharged, there is no longer a large electrical potential generated between the W plug and the wire during the subsequent wet-cleaning step. As a result, the exposed tungsten is unlikely to oxidize and the W plugs are protected from corrosion. Furthermore, the IPA and NMP solvents do not chemically attack the interconnect wire patterned over the W plug, and consequently wire corrosion is also prevented.
Since IPA and NMP solvents are commonly used in an inter-medium rinse process performed after oxygen plasma etching and wet cleaning (e.g. with EKC-265™) and before a Quick
Chi Chung Chia
Hung Lee Chun
Ke-Wei Tung
Tai Chen Chung
Blum David S
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Jr. Carl Whitehead
Macronix International Co. Ltd.
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