Method of preventing threshold voltage of MOS transistor...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S258000, C438S374000, C438S451000

Reexamination Certificate

active

06908810

ABSTRACT:
A method of preventing decreasing threshold voltage of a MOS transistor by formation of shallow trench isolation. Shallow trenches are formed to isolate first active regions and second active regions. The first active regions are located within a core circuit region, while the second active regions are located within a peripheral circuit region. A first ion implantation to form well regions is performed on the first and second active regions, respectively. A second ion implantation is performed on the second active region and edges of the first active regions to form second channel doping regions and to increase ion concentration at the edges of the first active regions, respectively. A third ion implantation is further performed on the first active regions to form first channel doping regions.

REFERENCES:
patent: 5061654 (1991-10-01), Shimizu et al.
patent: 5571731 (1996-11-01), Gr utzediek et al.
patent: 6043123 (2000-03-01), Wang et al.
patent: 6107126 (2000-08-01), Wu
patent: 6228704 (2001-05-01), Uchida
patent: 6417044 (2002-07-01), Ono
patent: 6455362 (2002-09-01), Tran et al.
patent: 6461920 (2002-10-01), Shirahata et al.

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