Method of preventing cracks in insulating spaces between metal w

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438669, 438618, 438652, 438598, 438597, 438622, 257773, 257758, 257633, H01L 2358, H01L 2348, H01L 2352, H01L 2144, H01L 214763

Patent

active

061177652

ABSTRACT:
A semiconductor device having a metal layer pattern which prevents cracks from forming in insulating spaces. The semiconductor device includes a plurality of metal layers stacked vertically and a plurality of insulating layers, interposed vertically between the plurality of metal layers. A metal wiring pattern is formed on each of the plurality of metal layers. The wiring patterns are separated by insulating spaces, and the insulating spaces in each of the plurality of metal layers are vertically shifted with regard to the neighboring one of the plurality of metal layers.

REFERENCES:
patent: 5760429 (1998-06-01), Yano et al.

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